# Help to understand output levels of clock buffer

I'm dealing with clock buffer and trying to determine how output levels depends on the input. I'm using information from the datasheet. Here is the table with information:

I don't understand the information in this table completely. We see that output high voltage is measured at the certain conditions. The supply voltage is VDD=Min=1.65. The input voltage is VIH or VIL. I don't understand that. I expect the output voltage to be measured at the certain input voltage.

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Could you provide a link to the datasheet, please? – Joe Hass Feb 23 '14 at 14:58
Here is the descriptive page. Press Download datasheet. – zulunation Feb 23 '14 at 15:45
Sorry forgot to add a link pericom.com/products/clock-and-timing-ics/clock-buffers/… – zulunation Feb 23 '14 at 16:45

Specifically, the output voltage is guaranteed for the given load under any input that conforms to the $V_{IH}$ or $V_{IL}$ requirements, even the highest $V_{IL}$ or the lowest $V_{IH}$. – Spehro Pefhany Feb 23 '14 at 15:26