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In some ADC/DAC devices their are options to output/input the data in 2's Complement form.

What are advantages of representing digital data in Two's Complement form When you can simply have straight binary code and save time of conversion?

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Two's compliment is a straight binary code... –  Mooing Duck Mar 12 at 23:41
"Algebra is run on a machine (the universe) that is two's-complement" - HAKMEM 154 (inwap.com/pdp10/hbaker/hakmem/hacks.html) –  ChrisInEdmonton Mar 13 at 1:41
What is 5 in two's complement? 101. What is 5 in straight binary code? 101. What is -5 in two's complement? 1...11111011. What is -5 in straight binary code? Uhh... –  immibis Mar 13 at 10:15

6 Answers 6

up vote 10 down vote accepted

Two's compliment representation of signed integers is easy to manipulate in hardware. For example, negation (i.e. x = -x) can be performed simply by flipping all the bits in the number and adding one. Performing the same operation in raw binary (e.g. with a sign bit) usually involves a lot more work, because you must treat certain bits in the stream as special. Same goes for addition - the add operation for negative numbers is identical to the add operation for positive numbers, so no additional logic (no pun intended) is required to handle the negative case.

While this doesn't mean it's easier from your perspective, as a consumer of this data, it does lessen the design effort and complexity of the device, thus presumably making it cheaper.

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Flipping bits then adding 1 to negate, no?? –  Scott Seidman Mar 12 at 11:15
@ScottSeidman Yes, sorry, I forgot that bit. Edited to fix :) –  Polynomial Mar 12 at 11:16
Actually, for maximum pickiness, depending on the processor it may be a single cycle to take x = x * -1, or x = 0 - x, versus at least two cycles for x = ~x + 1 –  markt Mar 12 at 12:05
@markt Yes, but if you're only implementing a minimal device (i.e. not a full processor) then it makes sense to cut the complexity of the silicon down to a bare minimum. –  Polynomial Mar 12 at 12:07
+1 Also, Two's complement only has a single value for 0. Others (such as one's complement or sign bit) end up having two –  sbell Mar 12 at 12:36

The ADC can convert data (say input voltages between 0 and 5V) and you either need that data to be unsigned (0V=0, 5V=max code) or signed (2.5V=0, 0V=max -ve, 5V=max +ve).

In addition to 2's complement being the commonest computer representation for signed data, the conversion between the two formats described above is completely trivial : simply invert the MSB!

This is incredibly cheap to add to the ADC's internal logic and gives the ADC another selling point on the datasheet...

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Just added the MSB switch between two's complement and offset binary as a comment below –  Scott Seidman Mar 12 at 13:02

If you need to perform math on the representations of negative numbers, twos complement makes that easier than offset binary, which will match with the "signed int" data type. Your compiler will simply know how to deal with it. Otherwise, you spend clock ticks converting back and forth.

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In the question, it seems to be implied that it takes longer for the ADC to return the value in 2's complement form than in straight binary. While this might be the case in some particular implementation of an ADC, it's not true in general (for example the MSP430 series of micro-controllers have an ADC peripheral on-chip which will report the value in straight binary or 2's complement, but it takes the same number of cycles in both cases).

With that out of the way, the choice between 2's complement and straight binary mostly comes down to how your transducers work and how you like to process your data.

In straight binary mode, the ADC is giving you a number which represents the ratio between the magnitude of the analog quantity measured (virtually always voltage) and the full-scale reference quantity. For example, a 10-bit ADC can return values from 0 to 1023 (inclusive). If you measure a voltage (say, 1.25 Volts) which is half of the ADC's reference voltage (say, 2.50 Volts), the binary code you read will be half of the maximum value you could read--so, 512, or thereabouts, subject to rounding and non-linearities in the ADC.

For example, let's say you have a transducer which reports the amount of rocket fuel in a tank. 0V means the tank is empty and 2.5V Volts means it's full. So you just connect the transducer to your ADC, and away you go!

But notice that in the above paragraph, there's no way to measure negative voltages. What if we wanted to measure the flow of rocket fuel in and out of the tank (and we had a transducer to do so)? The ADC can't measure negative numbers, so we have a problem. However, there's an easy way to fake it using 2's complement mode: In this case, the transducer output is re-biased so that the zero point is halfway between the ADC's two reference voltages. In other words, positive flows are represented by voltages between 1.25V and 2.50V, and negative flows are represented by 1.25V to 0V--so flows into the tank will give ADC codes of 512 to 1023 and flows out of the thank will give codes of 511 to 0 (in straight binary format).

Now that's awfully inconvenient. We have to subtract 512 from each measurement before doing anything with it, which gives numbers in the range -512 to +511. The point of 2's complement mode is that it does this for you!

However, you still might want to use straight binary with a transducer that produces signed results. For example, your transducer might have differential outputs: In this case you'd want to subtract the inverted output from the non-inverted output anyway, so there's no advantage to using 2's complement.

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The two's complement system is in use, because it stems from how simple hardware naturally operates. Think for example you car's odometer, which you have resetted to zero. Then put the gear on reverse, and drive backwards for 1 mile (Please don't do this in reality). Your odometer (if it's mechanical) will roll from 0000 to 9999. The two's complement system behaves similarly.

enter image description here

Please note that I'm not really offering any new information here, just the odometer example which someone might find helpful - it helped me to understand the rationale of two's complement system when I was young. After that, it was easy for me to intuitively accept that adders, subtractors etc work well with the two's complement system.

And yes, my Nissan's odometer does work this way.

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What is this 'straight binary code' you speak of? I assume you mean having a sign bit which is '1' for negative and '0' for positive (or vice-versa). This has two more disadvantages over twos complement which have not yet been mentioned: one largely irrelevant these days and one important.

The largely irrelevant one is that you can represent one less number - i.e. 255 numbers in 8 bits. This is pretty irrelevant when you've got 32 or 64 bits but mattered when you had as few 4 or 6 bits to work with.

The more important one is that there are now two ways to represent the same number - specifically, 0 - +0 and -0 but +0 and -0 are the same number so your implementation needs to make sure that you're not comparing these numbers every time you do an equality check.

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I think you are off track here. You are talking about a sign-magnitude representation when the OP was pretty clearly talking about an unsigned binary representation. –  Joe Hass Mar 12 at 14:59
If you're talking about an unsigned representation then there is no advantage to Two's complement. It simply wastes a bit. –  Jack Aidley Mar 12 at 20:58

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