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For different input voltages in dual slope ADC, charging time remains same but discharge is proportional to the magnitude of the input voltage. How it works in that way ?

Charging time is independent of input magnitude but discharging time is dependent on magnitude. Why ?

enter image description here

What is the circuit ensures this ?

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Are you asking why it's designed that way, or how it works? – gwideman Apr 8 '14 at 6:24
Made some edits to make it more clear. hope now its fine. Thank you @gwideman – tollin Apr 8 '14 at 6:30
So during the integrate phase, a current source proportional to input voltage charges the capacitor for a fixed time. During measurement phase, a constant current source (drain) is used to discharge the capacitor for as long as it takes to reach zero volts. This transforms the magnitude to a time, so it can be measured by a counter running at a known frequency. Is that what you are asking, or something deeper? – gwideman Apr 8 '14 at 6:33
up vote 2 down vote accepted

If you drive at 30mph for 1/2 hour, then turn around and come home at 30mph it will take 30 minutes to get home.

If you drive at 70mph for the same 1/2 hour, then turn around and come home at 30mph it will take 70 minutes to get home.

So the time to get home is proportional to the speed. Analogous to 'home' is 0VDC at the integrator output, and the slope "going out" is proportional to the voltage, the slope "going home" is the reference, so a fixed slope.

Mathematically, the slope of the integrator output during the first phase is:

\$\frac {dv}{dt} = \frac {V_{IN}}{C_I R_I} \$

If you start from 0 and integrate for a fixed time T, then the voltage at the end of time Ti is

\$ V_{Ti} = \frac {T\cdot V_{IN}}{C_I R_I} \$

During the reference phase the slope is is

\$\frac {dv}{dt} = \frac {-V_{REF}}{C_I R_I} \$

If you start out at \$V_{Ti}\$ and integrate until the output reaches zero, the time required will be

\$T_{DE} = V_{Ti} \cdot \frac {C_I R_I}{-V_{REF}} = \frac {T\cdot V_{IN}}{C_I R_I} \cdot \frac {R_I}{-V_{REF}} = T \cdot \frac{V_{IN}}{V_{REF}}\$

So the ratio of the two times is \$ \frac{V_{IN}}{V_{REF}}\$, and the values of the integrator resistor \$R_I\$ and capacitor \$C_I\$ cancel out.

Edit: you've added a block diagram- the control logic determined the timing using the clock input - it also monitors the zero crossing of the integrator.

The timing is controlled by the counters and the input clock, so the integration time is X clock cycles (perhaps 1000 for a 3.5 digit ADC). Then the clock cycles are counted for the de-integration to determine the display value (from 0 to 1999 for a 3.5 digit ADC). Since both times are controlled or measured by the same clock frequency, the clock frequency also cancels out and you are left with a reading that is only dependent on the reference voltage to first order.

Of course, for complete cancellation, the resistor, capacitor and clock must stay stable during the few hundred milliseconds that it takes to make a measurement, but that is a pretty low bar- it eliminates most thermal variation and virtually all long-term drift considerations, so inexpensive parts can be used for a precision instrument.

To analyze the integrator in your circuit:


simulate this circuit – Schematic created using CircuitLab

The op-amp forces the inverting input to the same potential as the non-inverting input (ground in this case).

So the current from the input is \$ \frac{ V_{IN}}{R_I} \$, which must be supplied through the capacitor- it will (ideally) be exactly constant for constant input voltage, regardless of the voltage on the capacitor.

The block diagram you've linked shows the above integrator circuit (inverting type), which will actually produce the inverted waveform to the first one you've shown.

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During the integration time you charge a capacitor with a current proportional to the input voltage. The final voltage on the cap is proportional to the input voltage.

During the de-integrate time you discharge a capacitor with a known fixed current. Since the initial voltage was proportional to the input voltage the time it will take to decay to zero is also proportional to the input voltage.

So all you need to do to measure the input is time how long it takes to discharge the capacitance.

There are several other ways to design an ADC but this is a fairly simple method to implement.

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Discharge time proportional to voltage because it's at a constant current. Constant current is easy to arrange. Discharging a cap at constant current results in constant change in voltage per unit time. So translates voltage to time.

Consolidating my answers to your added schematic and questions:

The principles at work here are:

Apply to the capacitor, for a reference amount of time, a current proportional to the input voltage. The capacitor thus acquires an amount of charge proportional to the input voltage. Then apply a (negative) reference current to the capacitor, which will discharge to zero in an amount of time proportional to the charge, and hence proportional to the input voltage.

The circuit you showed to do this is a standard op amp integrator, as explained here: https://en.wikipedia.org/wiki/Op_amp_integrator and lots of othre places if you don't like that one :-).

This transforms the problem of comparing input and reference voltages into a comparison of two time periods, which is possible to do quite accurately (and conveniently uses a digital counter). Accuracy is greatly helped by having the same resistor and capacitor used for both the signal and reference phases.

This method is used in situations that need to be accurate but can afford to be slow, like in a digital multimeter.

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I put one circuit that I found in google images. What in this circuit ensures constant current discharge ? – tollin Apr 8 '14 at 6:59
Charging phase has input voltage which is the actual voltage to be measured. Charge rate is proportional to that voltage, and is allowed to continue for a fixed time. During discharge phase, there's a constant reference voltage, causing a reference rate of discharge, which is allowed to continue until cap voltage is zero... hence time proportional to the voltage that the cap reached during the first phase. – gwideman Apr 8 '14 at 7:07
The op amp with Resistor in, and cap in the feedback loop, is a standard integrator. It works because the op amp adjusts the feedback so that a current flows through the input resistor exactly correct to make the -ve input of the op amp equal to the +ve input (zero). – gwideman Apr 8 '14 at 7:09

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