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FPGA are, I reckon, (relatively) expensive because they can be reconfigured many times. If I were to make a design work on an FPGA, and decide to build several (though not many) of them on a custom board using the same code; is there another type of chip that would be cheaper, which I assume I would configure serially once and for all?

In a nutshell, I am looking for the equivalent of EPROM compared to EEPROM for configurable gate array chips.

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IF the FPGA haven't come so common to the point where PROM equivalents are more expensive for the same capacity/speed. –  Mister Mystère Apr 20 at 16:43
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4 Answers 4

up vote 2 down vote accepted

Actel (now Microsemi) has both antifuse- and Flash-based FPGAs. (Antifuse: one-time programmable, Flash: programmable many times. Actel's Flash-based FPGAs directly incorporates Flash instead of SRAM.) Moreover, the same EDA software package is used for both types, meaning the same final design can be programmed to both antifuse- and Flash-based FPGAs.

This is how I see it can be done: 1. Choose an antifuse-based FPGA as target, according to your requirements. 2. Design by temporarily targeting an equivalent Flash-based FPGA. 3. During the design-debug process, the reprogrammability of the Flash-based FPGA can be very indispensable. 4. Once the design is final, migrate it to the target antifuse-based FPGA.

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Excellent, I knew I have heard of those "fuse" and "antifuse" models. They seem faster and denser from what I've seen online, on top of being cheaper. As an exemple, could you tell me what is the equivalent of a Spartan 3E or Spartan 6 in fused ones (if possible why)? –  Mister Mystère Apr 21 at 10:42
It's not that obvious to compare Actel FPGAs and conventional SRAM-based FPGAs. For example, Actel FPGAs are fine-grained (instead of coarse-grained like SRAM-based FPGAs from Xilinx & company), meaning you have more control over individual gates rather than ready-to-use pre-designed blocks. Both have pros and cons. –  Stecomstar Apr 22 at 6:15
I see. Actually I would prefer that characteristic (even if it means, certainly so, lower performance) as I had the problem of not enough BRAM blocks even though there were plenty of gates to use around for that purpose. Considering only the number of gates, any suggestion? –  Mister Mystère Apr 22 at 9:18
Unfortunately I have not kept myself up to date with their offerings - the last time I used one was more than 5 years ago when I was researching asynchronous designs (a good case for Actel's fine-grained structure, since naturally most of Xilinx's ready-made blocks are tailor-designed / optimized for synchronous design). You're better off asking their customer service directly. During my time, they were very helpful and even provided lots of printed literature FOC. –  Stecomstar Apr 23 at 2:12
Any idea how much cost savings you get by using the antifuse device as compared to the flash device? –  The Photon Apr 24 at 19:23
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There isn't really any technology that competes with FPGAs by trading off field-programmability vs cost. There are ways to lower the cost of your FPGA, though:

  • Use the slowest speed-grade part your design can work with.

  • Use the smallest gate-count part you can comfortably fit your design into (but it is wise in most cases to retain some unused resources to allow for future upgrades, and to avoid absurdly long synthesis times)

  • Buy as many at a time as you can of a given FPGA part number. IC prices can go way down as volume goes up. If you have more than one project going, consider using the same FPGA in both to increase the volume you're purchasing of that part.

  • If your purchasing volume is more than maybe 20 pieces at a time or 100 FPGA's per year, contact the FPGA manufacturer directly and negotiate the price. Don't just accept the list price from a distributor.

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Thanks for your answer, which is complementary to W5VO's. They're both very good, I wish I could accept them both. I chose the other one for the excellent reasons why the FPGAs are expensive. –  Mister Mystère Apr 20 at 19:08
And Xilinx "EasyPath", which sounds like it is based around using rejects that failed functional testing, as long as the failure is in a block not used by this particular design. –  Ben Voigt Apr 24 at 23:27
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The problem with your premise is that FPGAs are completely volatile* already. There is no special manufacturing step used to create FLASH/EEPROM, the "program" is stored directly in the Look-Up Tables (LUTs) where it is needed to perform your arbitrary logic. The LUTs consist of small SRAM arrays that are programmed, as well as some switch routing.

I know that at least Altera has a program where you can "hardcopy" your FPGA design, but this is a custom manufactured device, not something you can program in the field.

Now CPLDs have non-volatile memory, but you'll be unlikely to find an OTP (One Time Programmable) variant of a modern CPLD that already has an EEPROM/FLASH variant because it's not saving the manufacturer any (or enough) money. They already have a working chip with an IC process that has FLASH capability, and there probably isn't enough demand to justify the costs of a different memory element. That being said, there are definitely OTP CPLDs and PALs, but these are generally older parts when EPROM (UV erasable) was more common.

FPGAs are expensive because they're large (silicon-wise), require expensive, leading edge processes, have high pin counts, are low volume, and have a massive design software suite that they are subsidizing.

*most of them... I know there are some with non-volatile memory in them, but the core is still the same.

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Thanks for your answer. So in short the answer is "programmable gates arrays are as cheap as they can be by being configurable several times, making them OTP makes them actually more expensive (or nonexistent) from a smaller demand", correct me if I'm wrong. There is one thing I don't understand though: the FPGAs are non volatile devices? From what I've understood on embeddedmicro.com, the Spartan6 needs to be reconfigured upon each powerup doesn't it? –  Mister Mystère Apr 20 at 19:06
@DaveTweed, I think your edit reverses W5's point. I think what he's trying to say is the FPGA itself is nonvolatile --- it contains no permanently modifiable elements. They don't contain any EEPROM-equivalent to be replaced by PROM like the OP asks about. –  The Photon Apr 20 at 19:31
@MisterMystère It's not worth it because you would be adding in memory to give it an OTP feature. The larger die size for the memory and possibly extra processing steps would increase FPGA costs over a conventional, externally programmed FPGA. –  W5VO Apr 20 at 20:27
Mr. Mystere - W5VO overstates the case, I think. There are several situations where the extra expense is worth it, or at least can be. In some cases, the delay from power-up while the configuration loads is unacceptable. For another, access to the configuration allows reverse engineering of the system IP, and this may not be acceptable. In these cases, various companies, including Altera, make FPGAs which have the configuration determined by blowing internal fuses. These are pricey, and limited in gate count, but there is a market for them. (I've used them.) –  WhatRoughBeast Apr 20 at 23:20
Oh yes, and another reason for ponying up for the more expensive chip - radiation. Regular FPGAs use static RAM to store the configuration, and this is susceptible to radiation upsets. You can work around this, to some degree, by redundancy and majority voting, but the fuse approach is inherently more robust. This is not usually a consideration, but for satellites it's important. –  WhatRoughBeast Apr 20 at 23:44
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decide to build several (though not many)

'Several' doesn't get you to the economies of scale that make it worth the effort. And even if hundreds of thousands of people want several each, they will still want the device to perform different tasks, which means a level of programmability.

If you want something programmable (even once only) then it will have a large quantity of routing inside it (much more routing than logic in modern devices). The routing is what you are paying for, the way you configure it (ie OTP or volatile) is (to my understanding) a second-order cost influence.

Look at how microcontrollers have developed - program storage in flash (ie in-the-field reprogrammable) was once deemed to be purely the preserve of the product-development process and then OTP and mask-ROM devices were used in production. Now even very cost-sensitive consumer products and automotive controllers use flash micros routinely.

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