The basic 6T structure used for storing data is same as one used in "Positive Feedback Differential Voltage Sense Amplifier", then how come while the data is stored in SRAM memory cell it doesn't get amplified?
Yes, the transistors in the SRAM cell are functioning as amplifiers; it is the internal positive feedback that creates the bistable operation that is used to store information. However, the sizes of these transistors are kept as small as possible so that more of them can be fit into a given amount of area, and to keep leakage currents as small as possible.
When a read operation occurs, the outputs of the four internal transistors are connected to the bit lines by the word-select transistors. The weak internal transistors need to drive the bit lines low/high through the select transistors, which means that the available signal is somewhat attenuated, both by the voltage offsets introduced by the select transisors and by the relatively high capacitance of the bit lines. The resulting differential signal doesn't look at all like a "normal" logic signal.
It is the purpose of the sense amplifiers on each pair of bit lines to turn that weak differential signal into a normal logic signal that can then be fed to additional data multiplexers and/or I/O pin drivers.
In SRAM design, it takes a serious amount of analysis to determine how small the cell transistors can be while still providing enough signal during a read operation to achieve the performance goals for the device.