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I have an Ultra Wide Band transceiver with an internal power amp. This PA has two input pins for Vdd.

According to the manufacturer, each of these pins should be decoupled with three caps; 10p, 330p, and 0.1u.

I'm using 0402 packages for all of the caps. In which order should I physically place them, relative to the IC? In other words, should the placement be

0.1u -> 330p -> 10p -> IC

or should it be

10p -> 330p -> 0.1u -> IC ?

Thanks!

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Some manufacturers provide a recommended PCB layout in their product datasheets. Does yours? –  Majenko Jun 27 at 19:27
    
@Majenko Thanks, but no. They are responsive to email questions, but they're on the other side of the world so I won't get a response until tomorrow... Schedule's tight :) –  bitsmack Jun 27 at 19:29
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2 Answers 2

up vote 8 down vote accepted

The closest cap is inevitably always the smallest because the smallest cap will have the lowest/best capacitive reactance at the high frequencies where the chip supplier needs that decoupling: -

enter image description here

This is a good document by AVX on series resonance of capacitors and basically it's the series resonance of smaller caps that is higher hence while a big cap has turned inductive hundreds of MHz earlier, the smaller cap will still be ok.

See also this recent stack exchange post.

EDIT - I forgot to add that the further away the smaller cap is from the chip the more likelihood that the track inductance between it and the chip will cause bad effects. After all, the problem is one of series resonance of the cap with parasitic inductance and the parasitic inductance includes track length.

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Higher frequencies are most affected by line length. It makes the most sense to place the smallest caps (for high frequency smoothing) closest to the IC pins. The lower the frequency, the less line length matters and the further you can place the caps that are of larger size and still expect to receive the benefits.

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