Suppose I have some sensitive proprietary software (VHDL/Verilog) on an FPGA connected to my server so I can control it by SSH. Now suppose an attacker compromises my server and can communicate with the FPGA. Could the attacker read the sensitive software off of my FPGA?
- Anybody can ask a question
- Anybody can answer
- The best answers are voted up and rise to the top
The bitstream that controls the functionality of your FPGA is normally called the "configuration", not the "software". The configuration bitstream is generated by using FPGA synthesis tools to compile the Verilog/VHDL source code.
There are a number of different ways that the configuration can be transferred into the FPGA each time it "boots up". Roughly, they are:
If an attacker gets control of your server's CPU, then obviously he can read the disk file if the third setup is being used.
If the server's CPU has a direct connection to the FPGA's JTAG interface, then the attacker could read the FPGA configuration either directly from the FPGA, or indirectly by reading the EEPROM device.
In a security-sensitive application, you'll want to use the second setup, with the FPGA reading the configuration from EEPROM, and you'll want to make sure the server CPU does not have access to the FPGA/EEPROM JTAG port. Obviously, you won't store any of the FPGA Verilog/VHDL source code on the server, either.
Unless the attacker can reprogram the logic, read the flash/eeprom/boot rom or access your programming files on the computer the answer is no. There really is no way to fully determine the switch settings in the layer of cells that contain the configuration setting unless you have direct access to them through the JTAG / programming port.
You may be able to infer some settings in some situations but you'd barely scratch the surface.