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I've just recently started to become interested in electrical engineering after a couple years of programming and software development.

I've built a 4 bit ALU using a logic gate simulator and now I want to store a previous answer from the ALU into some memory cells.

I've been reading about flip flops and latches, and I've built an SR latch and it seems that I can easily store my answer in 4 of these latches, my question is, is this an efficient way of storing memory (considering the fact that I have no formal training or much understanding so I can't delve into optimization techniques just yet) or should I implement a clock triggered SR flip flop with clock input? How is the data read from the latch on demand?

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"Clock triggered SR flip flop with clock input" is basically a "D type flip flop". This is a very standard way of doing local storage within digital logic.

You don't explicitly read from it, it continuously outputs the stored value. If you have an array of them you need selectors of some sort (multiplexors, tri-state outputs, crossbar switches) to choose which one to use as the input of the next logic stage.

Edit: there's a question of scale. Flops are suitable for storing small amounts of data local to some logic. The next step up is SRAM: http://tams-www.informatik.uni-hamburg.de/applets/sram/ ; which is practical for a few hundred kilobytes. Beyond that DRAM, which uses a single transistor's gate capacitance to store each bit of data in. DRAM can be made extremely dense, but for manufacturing reasons usually has to be on a separate chip.

See also How does random memory access of RAM work?

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That's right, I believe you can improve your answe a bit adding some insights about how dram, that's what really used, works and why it's not built with DFFs. –  Vladimir Cravero Aug 7 at 15:39

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