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Inspired by this question I would like to know how low power you could go with a counter + 32kHz oscillator (possibly made by yourself).

I found a nice oscillator circuit on a BJT reportedly drawing less than $1.2\,\rm{μA}$ from 3V.

Unfortunately the counter and/or prescaler parts are a little more tricky. I do not believe you can make low power flip-flops from discrete transistors but most normal logic ICs are not very efficient either (standard counter ICs all draw around $80\,\rm{μA}$ at room temperature).

I do not want a counter that is integrated into a microcontroller (PIC or AVR or ARM).

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There are several issues here...

  1. The oscillator circuit on a BJT doesn't quite spit out +3.3v logic levels. Fortunately, you want to use a lower voltage to get lower power consumption. +1.8v logic levels would be compatible with that oscillator-- but then you'd need +1.8 and +3.3v power rails (and probably loose all benefits in your voltage conversion inefficiency.

  2. Dynamic power consumption (the power used when things switch) is mostly from charging and discharging the parasitic caps on the various signal lines. The way to reduce that is to use shorter, thinner wires. And by shorter & thinner I mean don't use wires and instead use a chip. Building this from a collection of chips and transistors instead of one chip that does everything will drive your power consumption up.

  3. You said no microcontroller, but honestly that's the best way to do this. TI has an ultra low power MSP430 that would run at 32.768 KHz at less than 1.5 uW. As you've already seen, this type of performance is really hard to beat. After a microcontroller, my next choice would be a Xilinx Coolrunner-II CPLD-- but I doubt that meets your requirements either.

To summarize, an MCU will give you the lowest total power consumption. Otherwise your best choice is to use standard logic parts and suffer with something in the several hundred micro-watt range. Making something out of discrete transistors isn't going to be better.

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The MSP430 you linked to is quite impressive but I cannot verify you 1.5uW power consumption (the lowest thing I could glance from the datasheet is about 15uW) and it does not have a 32kHz crystal oscillator. – jpc Apr 8 '11 at 20:56
You are aware the crystal oscillator is a separate part? – joeforker Apr 8 '11 at 21:13
@jpc I did a back of the napkin calculation to get 1.5 uW. The web page, not the PDF, says 0.9v and 45 mA/MHz. At 0.032768 MHz you get 1.47 uA. Then * 0.9v you get 1.32 uW. Then I rounded up to 1.5 uW. It's not super accurate, but nothing is when you're talking about power consumption on a CPU. It at least gets you into the proper ballpark. – David Kessner Apr 8 '11 at 21:19
@joeforker I'm not sure about the xtal osc. It's not obvious from the datasheet, but other TI products are just as non-obvious yet still support xtal's. If not, you could use that osc that JPC found and still be super low power. – David Kessner Apr 8 '11 at 21:21
@David You may be right that this is the lowest power way to go but it is strange that a whole uC uses less power than every single logic chip (even simple gates). The interesting thing is that the limiting factor in all of them seems to be the quiescent current and not the dynamic one. – jpc Apr 8 '11 at 21:26
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For the oscillator I'd use an RTC like NXP PCF8563, which provides a buffered 32kHz output and only consumes about 300nA @ 2V.

For the counter/divider I looked at HCMOS. According to NXP's HCMOS family specification quiescent current for a flip-flop is 4uA maximum, but that's @ Vdd=6V, so it should be lower at 3V. If you use 74HC93s (4 FF per device, you'll need 4 of those to get 1Hz) total quiescent current is 64uA maximum, which agrees with the 80uA you mentioned.
The good news is that at this low frequency dynamic power is far less than that.

Minimum supply voltage for HCMOS is 2V, so working at this voltage should also reduce the current. The PCF8563 even operates at Vdd=1V (since you don't need the interface).

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Square wave open-drain outputs aren't exactly conducive to low-power operation. If one is supplied by 3 volts and uses a 1Meg pullup current dissipation from the resistor alone will be 1.5 microamps. Too bad none of the parts I've seen have a low-duty-cycle pulse wave option. A 1024Hz pulse wave with a 16us low time (half a 32Khz cycle) would only use less than 0.05 microamps--a huge savings. – supercat Apr 9 '11 at 16:43
@stevenh But the guaranteed quiescent current over the commercial temperature range is 10 times higher. And an RTC manages to get 400nA over the whole industrial temperature range. Why NXP and Fairchild advertise new ultra-low-power logic gates that are only 2 times better in this regard? It is not that it is impossible to do better (like the RTC and MSP430 chips prove). MSP430 has the ability to go fast if needed, has normal output current capability and still does not sacrifice low quiescent current. – jpc Apr 9 '11 at 20:55
@supercat Yup, your low duty OC outputs are a really nice idea. – jpc Apr 9 '11 at 20:56
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Technically, the method to make the most power efficient (and fastest) circuit (anything) would be a Full Custom IC using the tiniest technology you can find. You'd have to design your own IC layout and have a foundry build a wafer for you.

There are universities that have agreements with some foundries, maybe you could research your local schools for information on that. If they are willing to help you then it would be free.

Static Free's Electric is a great free software to start building your own custom ICs.

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I wish there were some way to design something nice and psychically convince a microcontroller manufacturer that they should build it into their product. It would seem that a few cascaded quadrature graycode counters (within a single chip) should be able to count using less current than would be required by a synchronous counter, but with a cleaner output than would be offered by a ripple counter. My ideal device would probably have a 48-bit resettable counter which was readable as either the top or bottom 32 bits, along with a 32-bit compare register. – supercat Apr 8 '11 at 22:37
The counter and about 16 bytes (4x32 bits) of RAM would be separately powered, and should be able to run for decades off a very small battery, or for days if not weeks off a supercap. From a programming standpoint, it would be nice if the compare register could do a magnitude compare rather than just an equality compare, but provided there aren't weird synchronization issues, software should be able to work just fine using a latching equality comparer. – supercat Apr 8 '11 at 22:40
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If you think about simple ICs, you can get decent power consumption on CMOS chips. You may take single inverter in a chip, and a counter. Run it at some 1.8V, and hopefully it will eat very little :-)

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