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How do I implement coulomb counting algorithm ? Once I read the current using a ADC , what processing do I do ? say for 10ms load draws 1mA, next 5ms it draws 7mA. So am I supposed to just add the current for 15ms i.e 8mC is my charge removed from battery ? For this do I require a real time clock,other than initial SOC of the battery what other specifications are required, charging current, discharging current ? Once by battery is plugged in and being used by some applications do I need to integrate throughtout this period ? could someone just give an example of the equations that need to be implemented

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Current (I) = rate of change of charge (\$\dfrac{dq}{dt}\$) so integrate your current with respect to time.

1 amp flowing for one second is the delivery of 1 coulomb of charge. If you are sampling current at (say) every 10 milliseconds I'd consider using an analogue integrator and resetting it every 10 milliseconds just after sampling the integrator's output.

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so 10ms*1mA=10uC and 5ms*7mA=35uC which gives a total 45uC drawn from battery. so to perform this integration in software will i require a real time clock ? – user22348 Sep 4 '14 at 7:24
You don't need a real time clock (because these include calendars, they understand leap years and days of the month) but you do need to consider the accuracy of your crystal/clock circuit and choose the accuracy/drift appropriate to your application. – Andy aka Sep 4 '14 at 8:47
suppose i am sampling the current at 10ms. My application draws 1mA for 8ms and 10mA for next 8ms and 4mA for next 5ms. So am i supposed to integrate the current for 21ms or should i integrate for 10ms and reset my integrator and then again keep on doing this ? If the later case is true than why should i reset the integrator at the sampling rate ? What purpose will it serve ? @Andy aka – user22348 Sep 4 '14 at 9:52
@user22348 The big problem is that you are sampling slower than the frequency you are measuring - this will produce errors due to aliasing. Using a hardware op-amp integrator doesn't mean you have to reset it every sample but you do need to reset it to avoid it saturating against the power rails plus, using the hardware integrator means you don't have to worry about aliasing. – Andy aka Sep 4 '14 at 10:42
Integration is signaltime (+) next signaltime etc... Check the integrator at regular intervals to avoid saturation - maybe once every 100msecs but it really does depend on your application. You have a reading every 10ms - if that number is close to the maximum limit then reset the integrator. – Andy aka Sep 4 '14 at 11:26

I think if you built a summing integrator and fed it timed pulses from a reference voltage you could make a simple Delta-Sigma converter. Just count the pulses you have to feed it to drive it back near zero. You wouldn't even need an ADC, just a comparator and a hardware timer on the MCU.

Of course it could also be done with a monostable multivibrator rather than a timer in the MCU and trigger an interrupt with the comparator to count the pulses.

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A delta sigma ADC has a modulator and decimater.The modulator itself has a diff amp,integrator , comparator and 1 bit DAC. I sample the voltage across a sense resistor say at Fs. So i know the duration of a sample.In order to get the current information i have to scale it with the resistance value(This can be done in software).So the pulses are not current but voltage. So integrating them wont give me charge until they are scaled. suppose i just have a ADC or a comparator available with me,then what signal processing stages will come ? – user22348 Sep 5 '14 at 5:59
I am trying to achieve this on a fpga. So i have a ADC and comparator. The counter you are saying is to count the no of pulses fed so we exactly know the charge drawn or provided ? Does that means ill require a counter outside the fpga ? – user22348 Sep 5 '14 at 6:00
You can easily implement a counter in the FPGA. – Spehro Pefhany Sep 5 '14 at 11:28
Ya counter can be implemented in the fpga. I just want to know what processing steps are required to get the current information from the voltage across the sense resistor before i use the information in any algorithm. If a could just visualize the blocks it will clear my doubts – user22348 Sep 5 '14 at 11:31
You can do that (and it's probably the simplest way) but you have to take ADC measurements much faster than the current is varying. Since you have an FPGA you could probably take samples at 1MSPS+ if required. – Spehro Pefhany Sep 5 '14 at 12:01

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