Hi I want to know the following. An S-R latch can be implemented by means of
a. AND, NOR
b. NAND, NOR
c. AND, XOR
d. NOT, XOR
Hi I want to know the following. An S-R latch can be implemented by means of
a. AND, NOR
b. NAND, NOR
c. AND, XOR
d. NOT, XOR
According to my digital electronics text an SR latch can be created using both B) NAND, and NOR Gates. The difference between the two is active low or high with NAND active low and NOR active high.
-Ryan