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Hi I want to know the following. An S-R latch can be implemented by means of

a. AND, NOR

b. NAND, NOR

c. AND, XOR

d. NOT, XOR

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    \$\begingroup\$ Have you tried googling this? If so, what did you find? \$\endgroup\$
    – Andy aka
    May 20, 2015 at 22:10
  • \$\begingroup\$ Nothing found on google. \$\endgroup\$
    – Mohsin Ali
    May 20, 2015 at 22:13
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    \$\begingroup\$ Is this a homework? What have you attempted so far? \$\endgroup\$ May 20, 2015 at 22:14
  • \$\begingroup\$ this is a given mcq, i could not figure it out, so posted the question here.before that i have tried all possible sites. \$\endgroup\$
    – Mohsin Ali
    May 20, 2015 at 22:18
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    \$\begingroup\$ All possible sites??? That's just silly. :) The thing to do - if you're really driven to find out - is to sit down with a pencil, some paper, a big eraser, and connect up different types of cross-coupled gates until you come up with something which matches an R-S latch truth table. Easier than that, you could use a simulator. \$\endgroup\$
    – EM Fields
    May 20, 2015 at 22:35

1 Answer 1

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According to my digital electronics text an SR latch can be created using both B) NAND, and NOR Gates. The difference between the two is active low or high with NAND active low and NOR active high.

-Ryan

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    \$\begingroup\$ For future reference. Homework questions on EE.SE enjoy/suffer a special treatment. We don't provide complete answers, we only provide hints or Socratic questions, and only when the O.P. had demonstrated sufficient effort of his own. Otherwise, we would be doing the O.P. a disservice, and getting swamped by homework questions at the same time. See also here. \$\endgroup\$ May 20, 2015 at 22:32
  • \$\begingroup\$ Exactly what i chose, however thank you very much sir. \$\endgroup\$
    – Mohsin Ali
    May 21, 2015 at 2:12
  • \$\begingroup\$ No problem good luck next semester \$\endgroup\$
    – Rwsselby
    May 22, 2015 at 13:05

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