All the circuits are feasible when correctly driven, but 2 & 3 are far more common, far easier to drive well and far safer wrt not doing things wrong.
Rather than give you a set of voltage based answers I'll give you some general rules which are much more useful once you understand them.
MOSFETs have a safe maximum Vgs or Vsg beyond which they may be destroyed, This is usually about the same in either direction and is more a result of construction and oxide layer thicknesses.
MOSFET will be "on" when Vg is between Vth and Vgsm
- In a positive direction for N Channel FETs.
- In negative direction for P Channel FETs.
This makes sense of controlling the FETs in the above circuits.
Define a voltage Vgsm as the maximum voltage that gate may be more +ve than source safely.
Define -Vgsm as the most that Vg may be negative relative to s.
Define Vth as the voltage that a gate must be wrt source to just turn the FET on. Vth is +ve for N channel FETs and negative for P channel FETs.
MOSFET is safe for Vgs in range +/- Vgsm.
MOSFET is on for Vgs> +Vth
MOSFET is safe for Vgs in range +/- Vgsm.
MOSFET is on for - Vgs > -Vth (ie gate is more negative than drain by magnitude of Vth.
Exactly the same as circuit 3
ie the voltages relative to the FET are identical. No surprise when you think about it. BUT Vg will now be ~= 400V at all timed.
Exactly the same as circuit 2
ie the voltages relative to the FET are identical. Again, no surprise when you think about it. BUT Vg will now be ~= 400V below the 400V rail at all times.
ie the difference in the circuits is related to the voltage of Vg wrt ground for an N Channel FET and +400V for a P channel FET. The FET does not "know" the absolute voltage its gate is at - it only "cares" about voltages wrt source.
Related - will arise along the way after the above discussion:
MOSFETS are '2 quadrant' switches. That is, for an N channel switch where the polarity of gate and drain relative to the source in "4 quadrants" can be + +, + -, - - , and - +, the MOSFET will turn on with
- Vds negative and Vgs positive
Added early 2016:
Q: You mentioned that the circuits 2 & 3 are very common, why is that?
The switches can work in both quadrants, what makes one to choose P channel to N channel, high side to low side? –
A: This is largely covered in the original answer if you go through it carefully. But ...
ALL circuits operate only in 1st quadrant when on: Your question about 2 quadrant operation indicates a misunderstanding of the above 4 circuits. I mentioned 2 quadrant operation at the end (above) BUT it is not relevant in normal operation. All 4 of the circuits above are operating in their 1st quadrant - ie Vgs polarity = Vds polarity at all times when turned on.
2nd quadrant operation is possible ie
Vgs polarity = - Vds polarity at all times when turned on
BUT this usually causes complications due to the inbuilt "body diode" in the FET - see "Body Diode" section at end.
In circuits 2 & 3 the gate drive voltage always lies between the power supply rails, making it unnecessary to use "special" arrangements to derive the drive voltages.
In circuit 1 the gate drive must be above the 400V rail to get enough Vgs to turn on the MOSFET.
In circuit 4 the gate voltage must be below ground.
To achieve such voltages "bootstrap" circuits are often used which usually use a diode capacitor "pump" to give the extra voltage.
A common arrangement is to use 4 x N Channel in a bridge.
The 2 x low side FETs have usual gate drive - say 0/12 V, and the 2 high side FETS need (here) sav 412V to supply +12V to the high side FETS when the FET is turned on. This is not technically hard but is more to do, more to go wrong and must be designed. The bootstrap supply is often driven by the PWM switching signals so there is a lower frequency at which you still get upper gate drive. Turn off the AC and the bootstrap voltage starts to decay under leakage. Again, not hard, just nice to avoid.
Using 4 x N channel is "nice" as
all are matched,
Rdson is usually lower for same $ than P channel.
NOTE !!!: If packages are isolated tab or use insulated mounting all can go together on the same heatsink - BUT do take due CARE!!!
In this case
Body diode: All FETS that are usually encountered* have an "intrinsic" or "parasitic" reverse biased body diode between drain and source. In normal operation this does not affect intended operation. If the FET is operated in the 2nd quadrant (eg for N Channel Vds = -ve, Vgs = +ve) [[pedantry: call that 3rd if you like :-) ]] then the body diode will conduct when the FET is turned off when Vds is -ve. There are situations where this is useful and desired but they are not what is commonly found in eg 4 FET bridges.
*The body diode is formed due to the substrate that the device layers are formed on is conductive. Device with an insulating substrate (such as Silicon on Saphire), do not have this intrinsic body diode, but are usually very expensive and specialised).