MOSFET ON and OFF current

Question

I want to understand what do they mean by ON and OFF current for a PMOS and NMOS. Is there a straight formula for it?

Answer 1

For PMOS and NMOS, the ON and OFF state is mostly used in digital VLSI while it acts as switch. If the MOSFET is in cutoff region is considered to be off. While MOSFET is in OFF condition there is no channel formed between drain and source terminal. When MOSFET is in other two regions it is ON condition and there is a channel formed between drain and source terminal. We deduce on and off condition by VGS, VDS and Vt inequalities(as shown in below figures). Once you know the region of operation you can apply the appropriate current formula to find out current.

Regions in which PMOS and NMOS can operate:

Answer 2

The answer above is pretty good, I just want to add this I-V characteristics plot to help you understand the operating region of the MOSFET.

Answer 3

The ON current is quite straightforward -- it depends on VGS, VTH and VDS. This current reasonably follows the ideal square law equations in Saturation or Triode (Linear) mode as appropriate.

The OFF current is a leakage current that flows when VGS is lower than the threshold voltage. In this condition, the Drain-Source current depends exponentially on VGS (in a similar way that a bipolar transistor's current depends exponentially on VBE). Generally this current is quite small -- and falls by a factor of 10 for each reduction in voltage about 80 mV lower than threshold.

For example, a FET might conduct 1 uA at threshold (say 1.0 V). At 0.92 V, it might conduct 0.1 uA, and at 80 mV lower (840 mV), the current would be 0.01 uA an so on. At very low VGS, the current becomes extremely small, and an additional component of drain-bulk junction leakage current (which is very temperature dependent) becomes noticeable.

In modern digital integrated circuits, a typical threshold voltage may only be 300 mV, and so when 'off' (VGS==0), it is only 4 'steps' below VTH. The leakage current would be then 0.01 % of the current at VGS=threshold (which might in turn be 0.01 % of the maximum current). However given that an IC may have billions of transistors (most of which are 'off'), it turns out that the small leakage from many 'off' devices can add up to similar currents as the few on (or actively switching) devices.

Answer 4

I am pretty sure that the formulas that Prahbat posted are wrong.

Let's say we have a PMOSFET which is on. VS = 24 V, and VD = 23.99 V. The gate voltage is 0.5 mV.

If we do a SPICE simulation with Si7461DP (which has Vt = -2.62), it should be in saturation mode. However, according to the formula it's not.

Because according to PMOSFET condition posted by Prahbat:

VDS > VSG - |Vth|

0.01 V > 21.38

0.01 is not bigger than 21.38.

Vth has to be approximately | 24 V | for the PMOSFET to be in saturation mode.

The correct formula is:

(Image source: https://www.slideshare.net/MahoneyKadir/regions-of-operation-of-bjt-and-mosfet)