While working on a frequency divider/counter (in this case a frequency subtractor) using flip-flops, I discovered a strange effect in a D flip-flop when I left the clock at a constant frequency, but varied the frequency of the D input.
In this LTSpice sim, the CLK is at a constant 2.88MHz, and the D frequency is stepped through from a range of 0.1MHz to 7MHz
After exporting the output of Q and processing the data in Python, I counted the amount of rising edges that took place, with respect to the frequency of the D input.
The relationship looks like the following. X axis is frequency of D in MHz, Y axis is number of rising edges from Q in a 5ms window
First thing of note is that the minimum counts occur at multiples of 2.88MHz (The clock), but what I was surprised to see is that the shape remained the same in both the region where Freq(D) was less than Freq(CLK) as well as greater. Even more surprising is the fact that on a more fine-grained simulation, the results are effectively linear
I set out to create a frequency subtractor which I suppose it is in certain regions, but all-in-all I wouldn't know what effect this is called, or why it produces this output. I would appreciate any speculation or further reading on the uses of flip-flops in ways like this.