# Is it possible to eliminate output ripple of SMPS's by using two parallel SMPS's to produce outphase outputs to each other?

simulate this circuit – Schematic created using CircuitLab

Obviously it can not be that way. But why? Imagine one converter with a phase detector of its switching frequency, outputs a flag when the phase is 180° and other one synchronises its own oscillator to output an outphase ripple to other. Then it will be like below:

Green one is the output sum of two AC ripples and the common DC. What are the reasons why this can not be done?

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Most computer motherboards have multiple phases on the SMPS going into the CPU and RAM. For example (gigabyte.com/news/1152/mb-news-03.jpg) hence the line of inductors and transistors surrounding the CPU. These converters are driven by dedicated controllers: (e.g. st.com/web/en/catalog/sense_power/FM142/CL1456/SC971 ) – Zuofu Jan 31 at 22:02
I suggest you run your simulation again, this time adding a current monitor between the 2 outputs. You may be amazed at how much current your approach draws/ – WhatRoughBeast Feb 1 at 0:08

The voltage ripple on the output is the integral of current in the output capacitor(s). If we assume the load draws a constant current then for the ripple voltage to be zero the current delivered from the switch mode converter(s) must also be constant.

If the ripple current from the switchers was a nice clean sinusiod at the switching frequency then what you propose would be possible. Instead as the name suggests it's a waveform resulting from switching, sometimes the current may be zero (bucks running in "continuous mode" do deliver current all the time, boosts, flybacks and converters running in discontinous mode don't) and when current is being delivered it's not quite at a constant rate (how close to constant it is depends on the value of the inductor). The exact shape of the waveform will depend on many factors including supply voltage and load current.

Having said that while your method won't completely eliminate ripple it will significantly reduce it. We call this a "polyphase" converter and it can be done with any number of phases from 2 upwards.

For now lets assume that the waveforms from all the converters are time-shifted copies of each other and are periodic at the switching frequency (these are approximatations of relality but good enough for now). We can view any periodic waveform as a series of sinusiods at harmmonics of the switching frequency.

If we have n perfectly matched phases then we eliminate any harmonics that are not a multiple of n. In general lower harmonics tend to be larger than higher ones for most waveforms and on top of this the output capacitor is acting as an integrator which means high frequency ripple currents have much less impact on ripple voltage than low frequency ones.

This is done in practice, for example http://www.linear.com/docs/4166 describes a converter IC that is designed to drive two phases directly and provides functionality for syncronising multiple chips to build converters with up to 12 phases.

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Is it possible to eliminate output ripple of SMPS's by using two parallel SMPS's to produce outphase outputs to each other?

No.

However, some switching power supplies are multi-phase, which means they have multiple power trains in parallel inside. This is usually done to increase the output current capability, but the phases are also usually run evenly staggered over a cycle to reduce ripple.

Eliminating ripple using two supplies would require each to having exactly the opposite ripple of the other, and then these two exactly averaging. It should be obvious that's never going to happen.

Other than specifying absolutely 0 ripple, the main fault in your thought process is that the ripple of switching power supplies is unlikely to be something that is symmetric per half waveform. Your diagram shows sine, for which this would work, but the ripple out of switching power supplies is more spiky than that. Or, it can be a trapezoid output with fairly sharp rise, then slower decay, or sometimes a slow rise with fast decay. Changes in the load will also affect the amplitude and shape of the ripple. These kinds of waveforms 180° out of phase don't average to a flat line.

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+1. As an addendum, the latest techniques look at introducing pseudo random jitter to the output ripple of SMPS's, which has the overall effect of mitigating harmonic amplitudes in distribution systems - the ripples are simply out of sync and interfere with each other. – Sean Boddy Jan 31 at 22:50

While you can't eliminate all the ripple, you can eliminate all components at the fundamental switching frequency by using a dual-phase switcher. An n-phase switcher can eliminate all harmonics up to the (n-1)th. Obviously in practice component mismatches and offsets cause some of this to be imperfect, but in practice very significant (10-20 dB) reduction is possible, and the peak-peak ripple at the output can be reduced, or equivalently, the output capacitance reduced for the same amount of ripple.

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Some SMPS ICs have sync inputs/outputs. With this type, it is possible to run multiple ICs in polyphase. This increases the ripple frequency and decreases the ripple amplitude, making it easier to filter.

It might be easier simply to use a single polyphase controller to handle multiple switches.

Free running SMPS ICs without sync I/O would not be easy, and may be impossible, to synchronise into a nice polyphase.

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