Theoretical analysis of amplifier circuit

Question

I have the circuit of the amplifier below. I want make the DC analysis and find the gain the amplifier produces and the cutoff freq(high-low).

My problem is that it's been 15 years since I was student and I remember nothing. I will appreciate any help provided.

Answer 1

I did the DC analysis by hand:

Summary:

Theoretical:

Ib = 5.963uA

Ic = 895uA

Ie = 900uA

Vce = 7.362V

Spice:

          --- Operating Point ---
V(n002):     6.71675     voltage
V(n005):     0.895875    voltage
V(n006):     0.248847    voltage
V(n001):     12  voltage
V(n004):     0   voltage
V(n003):     1.47768e-014    voltage
Ic(Q1):  0.0011241   device_current
Ib(Q1):  7.02464e-006    device_current
Ie(Q1):  -0.00113112     device_current
I(C2):   6.71675e-019    device_current
I(C1):   -8.95875e-020   device_current
I(R5):   -6.71675e-019   device_current
I(R4):   0.000497708     device_current
I(R3):   0.000504733     device_current
I(R2):   0.00113112  device_current
I(R1):   0.0011241   device_current
I(V2):   -0.00162883     device_current
I(V1):   8.95875e-020    device_current

Then the AC analysis:

Gain:

Summary:

Theoretical:

Voltage Gain: -17.6

Spice:

This gives you the -3db points:

f-low: ~= 500Hz

f-high: ~= 24MHz

Comments:

As you can see the theoretical and Spice DC analyses match closely. Spice differs since it takes many more factors into consideration.

Answer 2

Simplistic but possibly useful starter:

1. Gain

The load current flows in both the 4k7 and the 220r resistors.
So relative voltage ratio between THE two resistors is proportional to their resistances
as V=IR and I is common to them both.
Vin aPpears Cvross the 22r and Vout across the 4k7 so
gain is ~~~= 4k7/220r ~= 21.4 or
Gain ~~~= 20.

2. Maximum possible single stage gain

Many people deny this formula is 'real'.
It is.

NB the following is a magic formula which you can either remember and use or you can choose understand it. This is true only for silicon bipolar transistors.

• Max gain (magic formula) = 38.4 X available voltage

  = here = 38.4 x 12V.

  = 38.4 x 12 =~ 460

So Maximum possible gain is ~ 450

NB emitter reisistor must be bypassed (See below) with a suitably large cap when relying on Re alone for gain.

Available voltage swing is ~ 0 at this gain as all of Vcc needs to be dropped across Rl to maximize current to make dynamic Re small to make gain large.

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Arcane mumblings re above:

• The above occurs when the 220 R is bypassed with a large enough cap so that it is ~~ 0 ohms to ground at signal frequency.
  The gain then becomes 4k7/Te where Re is the emitter internal resistance.
  It happens as a caracteristic of silicon thet the internal Re - 26/mA. ie Re is 26 ohms at 1 mA, 13 ohms at 2 mA, 0.26 ohms at 10 mA etc.
  mAx gain occurs when Re = minimum = when current = maximum. This occurs when all voltage is across load )almost) so i= 4k7/12 ~+ 2.55 mA.
  From above Re = 26/2.55
  So max gain = 4k7/(26/2.55) = 460.

• Rearranging the above shows that Max Gain = Vsupply x Rload

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