Take the 2-minute tour ×
Electrical Engineering Stack Exchange is a question and answer site for electronics and electrical engineering professionals, students, and enthusiasts. It's 100% free, no registration required.

I have the circuit of the amplifier below. I want make the DC analysis and find the gain the amplifier produces and the cutoff freq(high-low).

enter image description here

My problem is that it's been 15 years since I was student and I remember nothing. I will appreciate any help provided.

share|improve this question
    
That's a SPICE schematic. Download a suitable SPICE simulator, such as LT SPICE, enter the schematic and do the analysis. –  Leon Heller Oct 30 '11 at 9:00
    
Thanks. I didn't know about LTspice. –  dempras Oct 30 '11 at 9:14
    
Here is my simulation. –  dempras Oct 30 '11 at 9:39
    
This doesn't answer your question, but you may be interested in this presentation (starting at about the 25:20 mark): infoq.com/presentations/We-Really-Dont-Know-How-To-Compute –  markrages Oct 31 '11 at 10:25

2 Answers 2

up vote 4 down vote accepted

I did the DC analysis by hand:

enter image description here enter image description here

Summary:

Theoretical:

Ib = 5.963uA

Ic = 895uA

Ie = 900uA

Vce = 7.362V

Spice:

          --- Operating Point ---
V(n002):     6.71675     voltage
V(n005):     0.895875    voltage
V(n006):     0.248847    voltage
V(n001):     12  voltage
V(n004):     0   voltage
V(n003):     1.47768e-014    voltage
Ic(Q1):  0.0011241   device_current
Ib(Q1):  7.02464e-006    device_current
Ie(Q1):  -0.00113112     device_current
I(C2):   6.71675e-019    device_current
I(C1):   -8.95875e-020   device_current
I(R5):   -6.71675e-019   device_current
I(R4):   0.000497708     device_current
I(R3):   0.000504733     device_current
I(R2):   0.00113112  device_current
I(R1):   0.0011241   device_current
I(V2):   -0.00162883     device_current
I(V1):   8.95875e-020    device_current

Then the AC analysis:

Gain: enter image description here

Summary:

Theoretical:

Voltage Gain: -17.6

Spice: enter image description here

This gives you the -3db points:

f-low: ~= 500Hz

f-high: ~= 24MHz

Comments:

As you can see the theoretical and Spice DC analyses match closely. Spice differs since it takes many more factors into consideration.

share|improve this answer
    
Thank you very much. I 've expected something like this in order to understand. –  dempras Oct 31 '11 at 6:30
    
Impressive. Can you suggest any textbooks on this matter? –  artistoex Nov 21 '11 at 11:18
    
@artistoex "Neamen: Microelectronics Circuit Analysis and Design (McGraw-Hill)" I think it is this book on Google books: books.google.co.za/… –  Konsalik Nov 22 '11 at 19:48
    
He's also written about semiconductor physics. Seems to be a very productive author. Thank you very much! –  artistoex Nov 23 '11 at 13:51
    
I made the library purchase the book. Unfortunately, in the preface it says DC analysis would be a prerequisite. –  artistoex Jan 25 '12 at 16:23

Simplistic but possibly useful starter:

enter image description here

1. Gain

The load current flows in both the 4k7 and the 220r resistors.
So relative voltage ratio between THE two resistors is proportional to their resistances
as V=IR and I is common to them both.
Vin aPpears Cvross the 22r and Vout across the 4k7 so
gain is ~~~= 4k7/220r ~= 21.4 or
Gain ~~~= 20.

2. Maximum possible single stage gain

Many people deny this formula is 'real'.
It is.

NB the following is a magic formula which you can either remember and use or you can choose understand it. This is true only for silicon bipolar transistors.

  • Max gain (magic formula) = 38.4 X available voltage

    = here = 38.4 x 12V.

    = 38.4 x 12 =~ 460

So Maximum possible gain is ~ 450

NB emitter reisistor must be bypassed (See below) with a suitably large cap when relying on Re alone for gain.

Available voltage swing is ~ 0 at this gain as all of Vcc needs to be dropped across Rl to maximize current to make dynamic Re small to make gain large.


Arcane mumblings re above:

  • The above occurs when the 220 R is bypassed with a large enough cap so that it is ~~ 0 ohms to ground at signal frequency.
    The gain then becomes 4k7/Te where Re is the emitter internal resistance.
    It happens as a caracteristic of silicon thet the internal Re - 26/mA. ie Re is 26 ohms at 1 mA, 13 ohms at 2 mA, 0.26 ohms at 10 mA etc.
    mAx gain occurs when Re = minimum = when current = maximum. This occurs when all voltage is across load )almost) so i= 4k7/12 ~+ 2.55 mA.
    From above Re = 26/2.55
    So max gain = 4k7/(26/2.55) = 460.

  • Rearranging the above shows that Max Gain = Vsupply x Rload


share|improve this answer

Your Answer

 
discard

By posting your answer, you agree to the privacy policy and terms of service.

Not the answer you're looking for? Browse other questions tagged or ask your own question.