The following links MAY be of use to you.
Zero guarantees.
DE2 Hyerterminal wannabe
RS232 from scales wannabe
UART / DE2 with links elsewhere
This looks useful Altera UART core overview. Chapter 8 in vaguely specified manual.
Do you have / are you using SOPC builder?
It SOUNDs to do what you want
The universal asynchronous receiver/transmitter core with Avalon®
interface (UART core) implements a method to communicate serial
character streams between an embedded system on an Altera®
FPGA and
an external device. The core implements the RS-232 protocol timing, and
provides adjustable baud rate, parity, stop and data bits, and optional
RTS/CTS flow control signals. The feature set is configurable, allowing
designers to implement just the necessary functionality for a given
system.
The core provides a simple register-mapped Avalon Memory-Mapped
(Avalon-MM) slave interface that allows Avalon-MM master peripherals
(such as a Nios®
II processor) to communicate with the core simply by
reading and writing control and data registers.
The UART core is SOPC Builder-ready and integrates easily into any
SOPC Builder-generated system. This chapter contains the following
sections:
■ “Functional Description” on page 8–2
■ “Device and Tools Support” on page 8–4
■ “Instantiating the Core in SOPC Builder” on page 8–4
■ “Hardware Simulation Considerations” on page 8–9
■ “Software Programming Model” on page 8–9
One level up above chapter plus many other modules
Using the DE2 JTAG UART about page 9 on.
