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I am reading the datasheet of an ARM Cortex chip, specifically the GPIO chapter. Ultimately, I want to configure various GPIO pins to use them in "Alternate Function" mode for read/write access to SRAM.

Of all the GPIO registers available, I do not understand two: GPIO_PUPDR and GPIO_OTYPE which are respectively the "pull-up/pull-down register" and the "output type register".

For GPIO_PUPDR I have three choices:

  • No pull-up or pull-down
  • Pull-up
  • Pull down

For GPIO_0TYPE I have two choices:

  • Output push-pull
  • Output open-drain

What is the difference between all the different configurations, and which would be the most appropriate for SRAM communication?

The documentation for the board I am working on is available here (see page 24 for the SRAM schematics). The reference manual for the ARM Chip is available here (see pages 145 and 146 for the GPIO registers).

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Can you supply model numbers/links to datasheets of the SRAM and ARM CPU your using. –  Dean Mar 15 '12 at 9:38
    
@Dean: Sure. I have updated my question with two links. –  Randomblue Mar 15 '12 at 10:21

1 Answer 1

up vote 14 down vote accepted

This answer is general to processors and peripherals, and has an SRAM specific comment at the end, which is probably pertinent to your specific RAM and CPU.

Output pins can be driven in three different modes:

  • open drain - a transistor connects to low and nothing else
  • open drain, with pull-up - a transistor connects to low, and a resistor connects to high
  • push-pull - a transistor connects to high, and a transistor connects to low (only one is operated at a time)

Input pins can be a gate input with a:

  • pull-up - a resistor connected to high
  • pull-down - a resistor connected to low
  • pull-up and pull-down - both a resistor connected to high and a resistor connected to low (only useful in rare cases).

There is also a Schmitt triggered input mode where the input pin is pulled with a weak pull-up to an initial state. When left alone it persists in its state, but may be pulled to a new state with minimal effort.

Open drain is useful when multiple gates or pins are connected together with an (external or internal) pull-up. If all the pin are high, they are all open circuits and the pull-up drives the pins high. If any pin is low they all go low as they tied together. This configuration effectively forms an AND gate.

When driving an SRAM you probably want to drive either the data lines or the address lines high or low as solidly and rapidly as possible so that active up and down drive is needed, so push-pull is indicated. In some cases with multiple RAMs you may want to do something clever and combine lines, where another mode may be more suitable.

With SRAM with data inputs from the SRAM if the RAM IC is always asserting data then a pin with no pull-up is probably OK as the RAM always sets the level and this minimises load. If the RAM data lines are sometimes open circuit or tristate you will need the input pins to be able to set their own valid state. In very high speed communications you may want to use a pull-up and and a a pull-down so the parallel effective resistance is the terminating resistance, and the bus idle voltage is set by the two resistors, but this is somewhat specialist.

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Just to be clear, what do you mean by "a transistor connecting to low and nothing else"? A transistor has 3 pins. How is each pin connected? –  Randomblue Mar 23 '12 at 17:10
    
@Randomblue - sorry - transistor collector or drain when acting as an output –  Russell McMahon Mar 24 '12 at 3:14
    
To clarify your answer on "pull down", what is the difference between "ground", "low", and "-ve"? –  Randomblue Jul 28 '12 at 13:26
    
I've made a lot of edits to your question, could you please check that I haven't made any mistakes? –  Randomblue Jul 28 '12 at 13:55
    
@Randomblue - Edits seem to be good. It makes me wonder what I wrote initially? You seem to have said what I think I thought :-). –  Russell McMahon Jul 28 '12 at 14:04

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