I have an ARM microprocessor connected to an FPGA through one 47 pin memory bus. Also, two identical PSRAMs (datasheet available here) are connected to the FPGA through 65 pins (47 for first PSRAM + 16 extra data pins for the second PSRAM + 2 extra control pins for the second PSRAM).
For emissions testing, I would like to drive both PSRAMs at the same time, and at full speed. However, to drive both PSRAMs independently at the same time, I would need 65 control pins between the ARM and the FPGA, but I only have 47.
I was thinking that I could drive both PSRAMs at the same time and in exactly the same way by routing the 18 extra pins for the second PSRAM to the first PSRAM.
However, there are two potential problems I am seeing:
WAIToutput signal for both PSRAMs might not behave the same way, and I do not see an obvious way to combine the two
WAITsignals into one.
When the ARM makes a
READrequest, there is a possibility that both PSRAMs will not return the same value on their data buses, which means that the combined data bus will be driven by both the PSRAMs in different ways.
Are there other problems I haven't considered with routing the pins of two different PSRAM to the same controller? Are there solutions to the two problems above?