Reading and writing SRAM

Question

I am setting up a audio delay circuit and i want to store the data on SRAM chip.

I am doing it with a 64khz clock and ideally i would like to write a word in every other pulse and read a word every other pulse so i'm reading and writing at 32khz - with a distance between the word addresses of course.

http://www.alliancememory.com/pdf/AS6C2016.pdf this is the link to the datasheet...

I was wondering if anyone knows a clever way to alternate addresses with 2 different 16 bit binary counters? or maybe there is an easier way in general to fulfill this task?

Also there isn't a clock pin on this chip which is confusing... do i just oscillate the "chip enable" pin?

Answer 1

Alternatively, you could use a FIFO like this one. These are available with enough memory. Also, you can easily have a variable delay. Simply delay the reading for N milliseconds after the write begins, and you have N milliseconds delay.

Answer 2

What would be ideal would be if you could have two counters which included three-state output drivers, so you could easily alternate between the values. Unfortunately, I don't know of any such beast. Your best bet if you want to use discrete logic is probably to use a counter each for read and write addresses, and then either a multiplexer or two sets of 3-state driver chips.

If all you're trying to do, however, is generate a programmable delay, you might be better off reading and writing the same address. Control your delay amount by either using a presettable counter which gets loaded each time it hits zero, a resettable counter with a circuit to detect when it reaches a programmable threshold, or a variable frequency clock.