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Basic Frequency Control Circuit

In the following schematic, why can't R4 be taken away and the feedback network pass output feedback through C2 and R2?

Schematic

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from what i learned by reading the answer to your other question, that would lead to infinite amplification for the DC part, thus overriding any AC signals. – noah1989 May 15 '12 at 13:32
Have you read the answers? It's pretty well explained – clabacchio♦ May 15 '12 at 13:32
I have read the answers and am extremely grateful to those that provided such detailed explanations. I now know why DC feedback is necessary and that R4 provides the network, however, nobody explained why feedback cannot travel from the output to the input via the capacitor route. I thought that the question was sufficiently different to that asked previously and so I created another post. – user1083734 May 15 '12 at 13:37
That's because you don't know what's the effect of the capacitor on DC current: you should look at it first: electronics.stackexchange.com/questions/18301/… – clabacchio♦ May 15 '12 at 14:13
Related question: electronics.stackexchange.com/questions/31888/… – stevenvh May 15 '12 at 14:13

marked as duplicate by stevenvh, clabacchio♦, markrages♦ May 15 '12 at 19:35

This question has been asked before and already has an answer. If those answers do not fully address your question, please ask a new question.

2 Answers

up vote 4 down vote accepted

You said it yourself "DC feedback is necessary". Capacitors block DC, so a capacitor in series with the feedback path eliminates DC feedback. For the purpose of DC analysis, think of a capacitor as a open circuit.

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Can't the opamp's V- be DC biased by placing R4 between both inputs? – Federico Russo May 15 '12 at 14:04
@federico: For a perfect opamp yes, but for a real opamp no. That is because real opamps have both some unpredictable offset voltage and high gain. For most opamps, shorting the two inputs and holding them near the middle will still cause them to slam to one supply rail or the other. For example, 1 mV offset error times 100k gain is 100 V, which ordinary opamps can't do. 1 mV offset and 100k gain are quite reasonable numbers. – Olin Lathrop May 15 '12 at 14:28
up vote 2 down vote

In a perfect world with ideal op-amps, this appears to work fine since with the pot at mid-position, the gain is -1 at all frequencies* (after all, C1 blocks any dc from reaching the op-amp, so the infinite gain after point 'a' has nothing to amplify). The problem is that op-amps have input offset voltage and input bias current.

Offset voltage is a small voltage that appears to exist between the + and - inputs. Bias current is a small current which flows into the + and - inputs. The offset voltage will cause the output to change but the capacitor C2 blocks this change from feeding-back to the input and cancelling the effect. Similarly the bias current causes C2 to charge-up, causing the output voltage to increase.

Eventually, the output voltage reaches the supply rail and the op-amp saturates.

  • Edit - strictly speaking, the gain at dc is undefined (\$\frac{\infty}{\infty}\$)
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Is there something I've missed? (Down-vote) – MikeJ-UK May 15 '12 at 17:28
Even outside the offset/bias issues, the circuit is equivalent to trying to define g(x) as a function of f(x), knowing only that the two functions have equal derivatives everywhere. Depending upon the initial charge in the capacitors, the output voltage could be anything. – supercat Feb 19 at 18:26
@supercat - Yes, hence my additional comment about the gain being undefined. – MikeJ-UK Feb 20 at 10:53

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