Hi I'm a computer science student doing a computer hardware course and am having trouble understanding this circuit which is supposed to show how control signals at the memory can be generated using this address decoding circuit.
The explanation of the diagram is: "The generation of the necessary control signals at the memory is shown in the following circuit, which is an address decoding circuit. It decodes the address to generate individual control signals to the different memory locations. When READ is active(0), READ0 is active(0) if ADDRESS is 0, and READ1 is active if ADDRESS is 1. The write control signals are similarly activated".
Would someone mind helping me understand how this circuit works? I know that the 4 gates on the right are OR gates and that to give an active output only one of their inputs needs to be active.