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SPI Flash largest size is 512MB at $9/ea: SPI Flash prices


2GB of microSD $3/ea (some with $1 shipping): microSD prices

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up vote 21 down vote accepted

Welcome to the world of consumer electronics and manufacturing in volume! Nobody ever said it made sense!

The difference in price has nothing to do with anything technical. It is purely the economics of the market. The SPI Flash is being sold in relatively low quantities and somewhat high profit margins. The SD card is being sold in huge quantities and a very low profit margin.

While on the surface it might seem that the SD card would be more expensive since it has a smaller capacity and less "middlemen", that obviously isn't the case.

Another complication is that you could buy one make/model of SD card today, and then buy the same make/model in 3 month, and you would not be guaranteed to get the exact same thing. In those 3 months the internal design of the SD card could change. For most consumers this would not matter, but for some embedded users this could kill your application. Also, the SD card maker is not going to tell you of these changes. The same is not true of the SPI Flash, where you will most likely get the same thing for years.

You can get SD cards from manufacturers that will guarantee that they sell the same part for years, but it will be much more expensive.

These things are true of many products, not just SPI Flash and SD Cards. Memory (Flash and RAM) is the most obvious one. Another one is the iPad. In many cases it would be cheaper to buy iPads in bulk than to try and manufacture your own-- even in 100,000 unit quantities. You can't underestimate the purchasing power of a large company building millions of units at a time.

There are other factors that I didn't cover. Differences in part types, packages, purchasing channels, etc. But the problem you raise is more complicated than any one single factor can account for. My market/economic explanation is the biggest factor, but not the only one.

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It's worth noting that while using SD cards makes it more likely that in a few years one will still be able to get something that works "mostly" like the chip one is using today; the $50,000 question is whether that "mostly" is going to be good enough. Suppose, for example, one commands an SD card to write two blocks and then immediately loses power. Some might be designed to ensure that the first write will have succeeded before accepting the second command, and the second block will hold entirely old or entirely new data. Others... – supercat May 18 '12 at 17:55
...might have both blocks hold old data (e.g. if they accept the second write command before the first completes), and might even have new data in the second block while the first holds old data. Some might cause arbitrary blocks to be arbitrarily corrupted. Finding out what is or is not guaranteed about what a particular SD card might do in such cases is apt to be difficult. – supercat May 18 '12 at 17:56

The first part is NOR flash. The second is NAND flash, it is cheaper to produce. Learn more at Wikipedia here.

It isn't the interface that costs more, it is the type of flash that is the main driver.

Plus there isn't much competition in large SPI flash. I suspect that's the main driver at this density.

To @Olins question, NOR flash reads quickly (~100 ns) a word or byte at a time. NAND flash reads slowly (~us) an a block at a time.

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This doesn't explain why a SPI interface couldn't be added to a NAND flash and then have it be the same price as other large NAND flash chips. – Olin Lathrop May 18 '12 at 16:43
SD cards already have an SPI interface. You need to access the memory in pages though, which has RAM, speed and random access limititations.. – Cybergibbons May 18 '12 at 17:03
@OlinLathrop: The NAND-flash interface standards were developed before really fast serial data rates became commonplace, and at a time when systems with enough memory to use them would generally have an off-chip memory bus. A few details of their operation are a bit odd, but I've interfaced with them and it's not too hard. The biggest detail is that at least historically software was responsible for adding a layer of single-bit error correction (I think newer chips have multi-bit error correction built in... – supercat Jan 14 '14 at 17:46
...and software can probably just assume data will read correctly, but I don't know about that--it's been ages since I've looked at such things). – supercat Jan 14 '14 at 17:48

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