# How to Implement an Analog Ground Plane

I have seen this picture in a number of the Atmel datasheets. This one is from the ATTiny48/88 datasheet.

Can someone explain in some detail how to properly implement this on a 2-layer board? I have to imagine that the Analog Ground plane has to be connected to the digital ground plane somehow on the PCB, or does that happen internally in the AVR? Is the dashed line meant to be taken literally in terms of the shape and extents of the Analog Ground plane (there are no dimensions on the diagram, so I doubt it)?

-
 – tyblu Jun 4 '12 at 18:16

First, you probably don't need isolated grounds. It is used when return current produces a problematic offset (high currents), wide parallel data busses, quick rise/fall times (closing eye diagrams), and antenna[-like] copper pours. Use good decoupling practices and don't worry about it until it breaks.

Failing that, the next thing to try is a direct connection, with no extra impedances/filtering. Connect AGND and GND at only one point with relatively thick (i.e.: low inductance) traces, at the power supply. This is sometimes called a star ground when connecting several isolated grounds. It ensures that the return currents from some components don't contribute to an offset voltage for other components. Noise comes not only from the sink, but also the source: if bothering to isolate grounds, isolate, filter, and connect the respective voltage rails, too. This is as simple as decoupling (to the correct ground -- remember that caps transmit noise) with caps to ground, and, if needed, ferrite beads or inductors between equipotential rails.

Study the return current geometry before further modifying the ground system.

-
 This jives with my preconceived notions... I'll give it some time to be commented and voted on, but I'm inclined to accept this answer – vicatcu Jun 3 '12 at 19:19 This is only the most basic solution, @vicatcu. Others can provide great answers for more demanding layouts. – tyblu Jun 3 '12 at 19:23 Yes, very good point! Don't get fancy with multiple grounds unless you find that you have to! (Another example of where separate planes are helpful is if you have no choice but to send your digital ground all over the place in a EMI-heavy enclosure - i.e. board-to-board connections.) – Nathan Wiebe Jun 3 '12 at 21:37 @tyblu any idea how to represent AGND connected to GND in an Eagle schematic so that I can route them using a star topology, or should I spin off another question? – vicatcu Jun 4 '12 at 4:14 I remember having to 'kludge' this, a few years ago. It may be possible now, though. In fact, I think I've seen this question... electronics.stackexchange.com/q/23495/2118 – tyblu Jun 4 '12 at 18:10

I have used this technique before (on 4 layer, not 2, but it still holds), and I found several advantages and drawbacks of doing this. What they are specifically talking about is an island of ground plane that is not GND, but AGND, which is tied to GND at one single point, possibly through a small impedance. I'm not sure if the ATMEL has a separate AGND pin, but our dsPIC did. In this case there is no connection but an inductor between VCC and AVCC, and bypassing should never cross from VCC to AGND, or AVCC to GND. All analog signals are referenced to AGND (i.e. volt-dividers, anti-aliasing caps, etc). The whole point is to keep all the noise-creating digital circuits from dirtying up your analog rails.

As far as implementing their technique, they are just saying that the extents of this AGND island would roughly encompass this corner of the micro, as well as all bypassing between AVCC and AGND and your analog measurement circuits. It doesn't have to extend all the way to input ports for voltage measurements, etc, but at least to the low-side resistor of your volt divider and antialiasing cap, as well as any analog input amplifiers and their power supplies. By AVCC, I'm referring to the VCC after being filtered by the inductor.

We experimented with different impedances that connected GND and AGND, and found a 10 ohm resistor worked well to isolate the noise on the digital ground. If the impedance is too high, the micro will not be happy because it does expect the same DC potential on the two grounds. In our case, we had a separate low-noise LDO feeding the AVDD, and a high-power, noisy buck converter feeding the many devices on the digital VDD. The isolation you would achieve (to keep the noisy digital stuff from polluting your analog rails) is less with just an inductor and a separate ground island as this datasheet suggests, but it is much simpler to implement.

A simple test to check if you are improving your analog rail noise is to use your ADC to convert a DC value, and plot the raw measurements on a histogram or do a stdev in Excel. In a perfect/noise-free world, you would have no variance in this measurement, but in the real world you have a certain amount of variance proportional to your noise levels.

-
At what frequency was the buck operating? What type of resistor was used? (0402, wirewound, etc.) – tyblu Jun 3 '12 at 18:17
In our case, the bucks were at 3MHz, 180kHz, and 900 kHz, which was within our required analog response of DC - 1MHz. We used a 1206 for current handling. As a non-isolated power conversion device, we had crazy (6kV) transients we had to survive due to UL/CSA/CE, and most of them seemed to couple in and hit the analog harder than the digital, so ferrites alone left us vulnerable to larger GND-AGND impulses. The fusing of that resistor/trace/inductor would be catastrophic, so we went with a big old 1206 R with a flat impedance for robustness. – Nathan Wiebe Jun 3 '12 at 21:44

I don't agree with Nathan's 10$\Omega$ resistor. Ground is sacred, and should be ground, i.e. as little voltage differences as possible. If your analog circuitry dissipates 3mA your analog ground will already have a 30mV offset.

I do agree with a single connection between the two ground, but then via a ferrite bead.

-
 Note that I did NOT suggest the 10 ohm as a starting point. I wouldn't suggest any one size fits all ideology about grounding, because there is ALWAYS an exception. Every problem is unique. I do know that the proof is in the pudding, and this is how we achieved the best results (highest SNR/ENOBs). And there is absolutely nothing wrong with 30mV of DC offset between AGND and GND. – Nathan Wiebe Jun 3 '12 at 21:31 What ruled out ferrite beads was that most had very little impedance in the low end of our analog ROI (DC - 1MHz), and low frequency beads left us wide open to 50us/1.2us transients. Our device was a non-isolated power conversion device, and as such had to survive the most gruelling conducted immunity testing in UL/CSA's repertoire (6kV surges, which all came in on channels referenced to analog, and 2kV for CE). 30 mV is nothing compared to what the AGND would briefy see if it was on a ferrite bead. – Nathan Wiebe Jun 3 '12 at 21:31