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If I have the following line of code in an Arduino based project:

__asm__("nop\n\t");

Will this have exactly the same effect as nop in PIC12F675? Does it matter that the PIC in question and the Arduino may operate at different speeds?

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Just wondering why the link I had here to a previous question where the code came from was removed? Sorry, I'm pretty new here. – ElectroNoob Jun 12 '12 at 12:31
@stevenvh it was about building an IR transmitter (rather than a robot), and it was the source of the PIC code I was providing for reference. Thanks – ElectroNoob Jun 12 '12 at 13:23

2 Answers

up vote 6 down vote accepted

A NOP usually takes 1 instruction cycle. The PIC12F675 seems to divide the clock by four for an instruction cycle:

"One instruction cycle consists of four oscillator periods; for an oscillator frequency of 4 MHz, this gives a normal instruction execution time of 1 \$\mu\$s." (datasheet p. 71)

So a 20MHz clock will give you delay of 200 ns (4/20 MHz).

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The AVR used in Arduino OTOH delivers 1 MIPS/MHz, so at 20 MHz clock it will most likely give a 50 ns delay (1/20 MHz).

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this is perfect, I can adjust my code to cater for these changes. Is there a set of terms or subject area I can research which will explain such concepts further? Your answer perfectly answers my question, I just mean for further education on my part. Thanks. – ElectroNoob Jun 12 '12 at 13:29
On further research it seems the delay is 62.5ns: arduino.cc/playground/Main/AVR – ElectroNoob Jun 12 '12 at 13:33
Yikes, well now I'm confused :) 250ns seems like a lot – ElectroNoob Jun 12 '12 at 13:42
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@stevenvh: Yes, this PIC uses 4 clock cycles per instruction cycle. Some of the 24 bit core parts like the one the other question was about use 2 clock cycles per instruction. However the 30F series, which is also a 24 bit core part, uses 4 clock cycles per instruction cycle. You have to check the datasheet. – Olin Lathrop Jun 12 '12 at 14:12
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@ElectroNoob - No, you confused me! The 62.5 ns is correct. I thought we were still talking about the PIC. But Arduino is AVR! And that does 1 MIPS/MHz, like I also said in my answer. Sorry about the confusion! – stevenvh Jun 12 '12 at 14:36
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Each processor has its own instruction set and therefore its own assembly language. Actually, there can be different assemblers for the same processor, each with a bit different syntax. It is the assembler that specifies what names you have to provide to indicate particular instructions. Typically assemblers will use the same names for instructions (called instruction mnemonics) that the documentation for the processor uses, but this is not always the case. You are asking about instructions on two different processors using different assemblers, so in general you can not assume any similarity just because the names are the same.

However, over the years a few common (certainly not standard though) instruction names have emerged. One such name is NOP, which refers to No OPeration. Most processors have a instruction that does nothing, and most assemblers name this instruction NOP. However, again, there is no guarantee that this is true of any one assembler so you should always check instead of assuming.

I am not familiar with the AVR instruction set, and certainly not familiar with it as presented by the arduino tools. I therefore don't know what the arduino NOP does that you are rerferring to. If it does in fact simply take one instruction cycle and do nothing more as the name NOP would suggest, then yes, it has the same effect as the PIC 12F675 (actually a 14 bit core device) NOP instruction. On the PIC traditional 14 bit core devices, NOP takes a single instruction word and executes in a single instruction cycle.

NOPs are usually used to insert short waits in code, like waiting a microsecond for a line to settle. By the way on this PIC, if you want to waste 2 instruction cycles, you can do it with the single instruction "GOTO $+1" with a few restrictions not worth getting into here.

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The 6809 (most beautiful 8-bitter ever) had a BRN (Branch Never) instruction, due to the orthogonality of the instruction set: there was a BRA (BRanch Always), and every branch instruction had its complement, so there was also the BRN. – stevenvh Jun 12 '12 at 13:13
Thank you, this is great information. – ElectroNoob Jun 12 '12 at 13:34
@stevenvh: The NMOS 6502 series had a few undocumented opcodes which would process a memory operand and ignore the result. A "nop 0" was a two-byte instruction which took three cycles to execute (as opposed to "nop", which was two bytes/two cycles). Useful as part of an odd-number-of-cycles delay. There was one do-nothing opcode which was two bytes/two cycles. A "read absolute memory and ignore the result" could be useful as a means of skipping a two-byte instruction. The "BIT zp" and "BIT abs" instructions were documented instructions that read memory and only affected flags. – supercat Jun 12 '12 at 16:11
@stevenvh: The BIT instructions were often used back in the day, since there was no support for the undocumented ones. Note that sometimes skipping instructions (or even using "nop 0") could cause trouble, if the resulting read cycle accidentally affected hardware (e.g. it hit a "clear on read" interrupt-status register). – supercat Jun 12 '12 at 16:13
MC6800 had an infinite duration "NOP" :-) - aka HCF or "Halt & Catch Fire" = $dd. Implement it and software wise it "did nothing" for a long long time. However, the address lines counted at clock rate (Clock/4 in MC6802) which was very useful for address decoder testing and similar. A useful code for 'throw up hands and walk away" events and memory traps. Fill unused memory with $dd. If processor ever left the universe it would be sure to not re-enter it randomly elsewhere. Whether this was a good idea depended on application etc. – Russell McMahon Jun 12 '12 at 16:20

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