I am loading the image of my Spartan 6 and it seems that it cannot go to the final step of the process: the "Startup Sequence". After I load the image byte by byte, and add a lot of extra clock cycles at the end, the status register of the FPGA reveals that there have been no errors, and
GHIGH STATUS status being high means that:
The device has properly received its entire configuration data stream. The device is ready to enter the Startup sequence.
I have checked that the
PROGRAMB are not pulled low preventing the startup sequence, and in the status register everything looks very promising.
Why is my Spartan 6 not entering the startup sequence after it received and is happy with the image?
(Below is the status register after configuration.)
 CRC ERROR : 0  IDCODE ERROR : 0  DCM LOCK STATUS : 0  GTS_CFG_B STATUS : 0  GWE STATUS : 0  GHIGH STATUS : 1  DECRYPTION ERROR : 0  DECRYPTOR ENABLE : 0  HSWAPEN PIN : 1  MODE PIN M : 0  MODE PIN M : 1  RESERVED : 0  INIT_B PIN : 1  DONE PIN : 0  SUSPEND STATUS : 0  FALLBACK STATUS : 0