In ISE, it is possible to select various "Startup Options" for the generate FPGA image by right-clicking "Generate Programming File", selecting "Process Properties", and then clicking "Startup Options". The listed startup options are:
- StartUpClk
- DonePipe
- DONE_cycle
- GTS_cycle
- GWE_cycle
- DriveDone
This document gives explanations for StartUpClk, DonePipe and DriveDone. What exactly is the DONE_cycle startup option? (And while we're at it, what are GTS_cycle and GWE_cycle?)