Sign up ×
Electrical Engineering Stack Exchange is a question and answer site for electronics and electrical engineering professionals, students, and enthusiasts. It's 100% free.

I'm a software developer (C, C++, objective-c, java ...) and I am interested in learning to program FPGAs. Now the question may appear simple to you but please do take time to help me on this one as I'm kind of stuck right now. My company has asked me to get familiar with the technology and work on a lattice product. My question is where to start? After some research I found that I could choose between VHDL and Verilog, I have never used any of them. Is there any specialist who could suggest me where should I begin? Learn a language, learn about the hardware components and then lattice product? Or directly start with Lattice product (as I read that programming methods are very different between FPGA vendors)?


locked by Dave Tweed 12 hours ago

This question exists because it has historical significance, but it is not considered a good, on-topic question for this site, so please do not use it as evidence that you can ask similar questions here. This question and its answers are frozen and cannot be changed. More info: help center.

If you're familiar with C/C++ programming, then you should choose Verilog, rather than VHDL. Verilog's syntax is similar to C. –  m.Alin Sep 17 '12 at 14:04
@m.Alin thanks for your suggestion :) –  Anila Sep 17 '12 at 14:13
@m.Alin I am just starting and I found out, that it doesn't matter, if it looks like C, because I found that the most difficult part wasn't syntax, but the difference in concepts. The semantics are not even close to those of C. –  Edgar Klerks Oct 9 '14 at 14:39
The biggest change I found from C/C++/Java/etc. is that modules you write (equivalent I suppose to translation units) are purely event driven. In C, simplified to a basic principle, a compiled program will carry out line 1 of your code, then line 2, then 3, then 4, etc. There is no such thing in Verilog/VHDL, it's a bit like drawing a picture: this input pin connects to module1_input, module1_output toggles state every time module1_input goes high. Instead of if(condition) it's when(condition). Most FPGA IDEs even have a graphic design input, as if you were drawing it on paper. –  CharlieHanson Jun 5 at 23:34

3 Answers 3

up vote 41 down vote accepted

Digital design does not have a lot in common with software development (maybe except that Verilog syntax looks a bit like C language but it just looks). Thus it is very hard to answer this type of question adequately. But as a guy who walked a path from software development to hardware design I'll give it a shot. Looking back at myself, here is how I would have advised myself back then if I knew what I know now:

Start from scratch

Forget everything about software development. Especially programming languages. Those principles do not apply in digital design. It probably would be easy for a guy who designed a CPU to program it in assembler or even C, but an assembler programmer won't be able to design a CPU.

On your learning path do not tend to solve what seem to be an easy problem with your existing knowledge from software. One of the classic examples is a "for loop". Even though you can write a for loop in, say, verilog — it serves a different purposes. It is mainly used for code generation. It may also be a for loop as software developers see it, but it won't be good for anything but simulation (i.e. you won't be able to program FPGA like that).

So for every task you want to tackle, don't think you know how to do it, do a research instead — check books, examples, ask more experienced people etc.

Learn hardware and HDL language

The most popular HDL languages are Verilog and VHDL. There are also vendor-specific ones like AHDL (Altera HDL). Since those languages are used to describe hardware components, they are all pretty much used to express the same thing in a similar fashions but with a different syntax.

Some people recommend learning Verilog because it looks like C. Yes, its syntax is a mix of C and Ada but it doesn't make it easy for a software developer to lean. In fact, I think it may even make it worse because there will be a temptation to write C in Verilog. That's a good recipe for having a very bad time.

Having that in mind, I'd recommend staring from the VHDL. Though Verilog is also OK as long as the above is taken into account.

One important thing to keep in mind is that you must understand what you are expressing with that language. What kind of hardware is being "described" and how it works.

For that reason, I'd recommend you get yourself some book on electronics in general and a good book like this one — HDL Chip Design (aka as a blue book).

Get a simulator

Before you start doing anything in hardware and use any Vendor-specific features etc., get yourself a simulator. I was starting with a Verilog, and used Icarus Verilog along with GTK Wave. Those are free open-source projects. Run examples you see in books, practice by designing your own circuits to get some taste of it.

Get a development board

When you feel like going forward, get a development board. If you know that your employer wants to go with Lattice, then get Lattice board.

The programming methods are very similar, but there are details that are different. For example, different tools, different options, different interfaces. Usually, if you have experience with one vendor, it is not hard to switch. But you probably want to avoid this extra learning curve.

I'd also make sure that the board comes with components that you are planning to use or is extendable. For example, if you want to do design a network device like a router, make sure the board has Ethernet PHY or it can be extended through, say, HSMC connector, etc.

Boards usually come with a good reference, user guide and design examples. Study them.

Read books

You will need to read books. In my case, I had no friends who knew digital design, and this site wasn't very helpful either because of one simple thing — I didn't even know how to phrase my question. All I could come up with was like "Uhm, guys, there is a thing dcfifo and I heard something about clock domain crossing challenges, what is it and why my design doesn't work?".

I personally started with these:

FPGA vendors have a lot of cookbooks with best practices. Study them along with reference designs. Here is one from Altera, for example.

Come back with more specific questions

While you go through your books, simulate a design, blink some LEDs on your development board, you would, most likely, have a lot of questions. Make sure you don't see an answer to those on the next page of the book or online (i.e. in the Lattice-specific forum) before asking them here.

Thanks a lot for this detailed answer, it really helped me see how can i procede. Unfortunately i don't have any friends who could help me either. But you just saved me from a lot of trouble and once again thanks a lot!!!! –  Anila Sep 17 '12 at 20:10
Excellent answer. –  Assad Ebrahim Oct 16 '12 at 20:16
Back in school, we learned C++ before we learned VHDL. Was having a lot of trouble understanding it but the point when everything clicked was when I understood that everything happens in real-time and in parallel (parallel, not asynchronous like nodejs). Software development follows a sequential flow, but in HDL, everything happens at once (most of the time). If you have something like "x=1; y=2; y=x; x=y", in SW, at the end y will equal 1, in HDL, you have a race condition as both x and y will try to change into each other at the same time. Just remember this and life might be easier for you. –  PGT Nov 13 '14 at 16:40
@PGT You shall expect y's value to be something other than 1 if 'y' is accessible to multiple processes running on either a single core or multiple cores, which can impose its authority on a weaker process. –  Adithya yesterday

As an alternative, you could use some high-level synthesis techniques such as Xilinx's Vivado HLS and Altera's OpenCL solution. Maybe this will alleviate your curve to learn hardware description languages, considering your software background.


First learn digital design basics. Mealy/Moore machine, combinatorial logic, truth table, karnaugh map and so on. Start creating a simple design in schematics (7-segment counter) and then learn a HDL. In Europe VHDL is used, in the US Verilog. Finally timing is important, be aware that signals have delays which are component instant and temperature depended and every signal has another delay.

Book to read:

Perfect Language syntax knowledge is for later, first understand digital design and the issues.

In Europe VHDL is used, in the US Verilog. Not true at all... –  Matt Young 2 days ago
Indeed, I learnt Verilog and I'm from the UK. It's also the language taught in one of the modules I did at uni (also in the UK). –  Tom Carpenter 2 days ago

Not the answer you're looking for? Browse other questions tagged or ask your own question.