# High input resistance - FET

What does high input resistance in fet mean? I always see this term when dealing with fet transistors like jfet and mosfets.

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For a MOSFET the high input resistance is caused by the isolation layer between gate and channel (blue in the picture):

The layer is made of SiO$_2$, which has an extremely high resistance of 10$^{16}$ Ω$\cdot$m, and is one of the best insulators existing.

That means that the voltage applied to the gate has no way to go, so there won't be any current, apart from a small leakage current (not through the SiO$_2$). MOSFET input opamps may have input resistances as high as 10$^{13}$ Ω.

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