Why is that the output signal is clipped despite the fact that the transistor's q point is located halfway of Vcc???
here is the schematic
and clipping here
From my analysis, as you can see, supply Vcc is around 40 volts and the multimeter reading of the collector voltage is around 20 volts (half of 40 so the q point / quiescent point is in the middle to avoid cut off and saturation)
Finally, you can also see that the output voltage swing is around 12 Volts rms (so that translates to 34 volts peak to peak, way far from the 40 volts of DC supply voltage)
Ref. http://www.mediafire.com/download.php?htnopk49oj1y9sj multisim