# Implementing Bne in MIPS Processor Circuit

I am trying to include BNE instruction in the following circuit without introducing a new control line. I have thought of many possible ways like adding muxes or and gates etc to implement it but after implementation, a problem always occured with any of the three instructions, PC+4 , BEQ and sometimes BNE itself. Now I need a little advice from the experts on how can I implement bne without introducing a new control line.Here is the circuit:

-
I am not an EE, but how difficult would it be to convert the zero signal into a condition satisfied/branch taken signal? Obviously, the ALU and its control would be more complex, so that just seems to be shifting complexity around--again, I am not an EE. (BTW, I think some early MIPS implementations performed the branch condition evaluation in separate logic and performed the branch target calculation in the ALU.) –  Paul A. Clayton Dec 6 '12 at 17:55