# Scanalogic DIY Logic Analyzer, Extending Sample Time

I just completed my build of the Scanalogic DIY logic analyzer. It's working great, but I am noticing something odd about it. This question will likely only make sense to someone who has used or built on of these devices.

So when I connect my device and retrieve a sample, it seems like the total sample time is limited to 0.5 ms. Unless I am using the software wrong and there is some way to extend this time, it seems oddly short. A few of the things I plan on analyzing with this device require a lengthier sample.

Does anyone know how this can be adjusted?

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Looking at the design this makes sense, the LA uses an ATmega16, which only has 1kB internal SRAM.
The link says it can sample at up to 4 million samples per second, with 4 channels. So if you do the math (1kB can be used to store 8000 logic states):

8000 / 4MHz = 2ms -> divided by 4 channels = 0.5ms, which is what you are seeing.

One way to lengthen the capture time would be to adjust the sample rate (e.g. reduce clock frequency or adjust code) but obviously you may miss certain events if you reduce it too much (you will have to judge this based on what your signal frequency is)

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Great observation, many thanks for that. – capcom Dec 25 '12 at 18:51

If you wish to increase sample time, the easiest approach is to throw more memory at it. Take a look at ATMega32,ATMega64 and ATMega128. The ATMega128 has 8K of memory which would mean a couple extra miliseconds of time. The upgrade should be pretty straightforward as far as code (not sure if all these are available in DIP).

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But it's not open source, so I can't play around with the code. Is there any way to attach external memory to my current setup? – capcom Dec 26 '12 at 3:58
I didn't realize it's closed source. Then there is really no way to add more memory unless you somehow hack the code. Upgrading the device as I suggesting is simpler in all cases to adding external SRAM (which is likely to be much more work and might not be worth it, or eve possible). I suggest you contact the developers and inquire about the source code. Or even better, build one yourself! – Gustavo Litovsky Dec 26 '12 at 4:05
I was thinking of this also but noticed it's only provided in hex format, which is a shame as this would have been the best option (maybe asking the author to provide an option for a higher spec ATmega might be an idea?). – Oli Glaser Dec 26 '12 at 13:07
@OliGlaser Maybe I will ask. I was wondering, however, if it would be possible for it to run continuously. So it just keeps transmitting the logic signals it picks up, and doesn't have to reach the capacity of its memory. Is this possible? I was thinking that the problem would be that UART speed is too slow, and unreliable at high enough speeds to match, say, even 1 MHz. – capcom Dec 26 '12 at 14:35
@capcom - yes, you are right about both there - it would be possible to read/send continuously using a buffer, but it would be limited by the maximum speed of the UART connection. Unfortunately also the firmware/software would have to be written this way (i.e. if the sample rate drops below a certain rate the data is sent continuously - this is what I would do if I was writing it, using a FIFO/circular buffer to synchronise the data rate) – Oli Glaser Dec 26 '12 at 18:14