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Active-low reset inputs seem to be a holdover from TTL logic where the falling edge was faster than the rising edge, so the falling edge was decided as more important to increase the maximum possible frequency.

I'm not so sure how relevant that is with modern CMOS but it's still very easy to find chips that are active low reset (my circuit board design, which uses some old-school 74XX chips, all have active low reset. Even the Microcontroller is active low reset). I'm guessing there's reasons beyond the technology used as to why this still pervades (such as active low would reset on a brown out condition, chips would reset on power-on, tradition, etc.).

Something that I haven't really thought about until now, is what would be the better design when driving active low logic (specifically resets on other chips) from a microcontroller. Is it better to:

A. Drive the resets directly from the microcontroller, with a 1 for an indefinite period of time, or

B. Add a pullup resistor to Vdd and use the microcontroller to briefly pull down to 0

Option B adds more footprint and cost (BOM), but I would guess it would be more stable, since it's passively being tied up to the non-reset position, and uses less static power consumption (even if negligible) on the uC since the output would be high for only a brief blip. Also trivial, but the programming would also be a little easier (Reset = 1 resets the line). Option A is simpler but, but an unintended reset on that line would cause the system to fail. A full power cycle would be needed to recover the system.

I also think about what position I would like to be in better with my design if the reset line also were to fail permanently -- if it were pulled up by a resistor, the system could still remain mostly functional, but if it was just the microcontroller driving the output, everything would be stuck in reset (completely nonfunctional). I've never heard of a single pin failing on a microcontroller though.

For an active low data line, I would never consider option B. There's no justification to add that many pullups.

I'm guessing there's no practical difference between the two (i.e., microcontrollers are reliable enough to drive a solid 1 for long periods of time without glitches), so I should go with A to save on cost and footprint. Is either option clearly better?

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don't forget the importance of open drain O/P's with active low logic to be able to share one common line for signalling of state, interrupts etc. – placeholder Jan 10 '13 at 4:25
up vote 1 down vote accepted

Essentially, either works; A is probably better, B is more flexible.

A will drive the reset line to '1' faster, which could be an issue on a very large board.

B allows the option of adding other means of driving reset - hidden switch + paperclip, brownout monitor, watchdog timer, etc. It probably doesn't even cost the board space for a resistor, because a lot of microcontrollers have software configurable pullup resistors on each pin.

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Without specific parts, you go with whatever the manufacturer suggests, either from the datasheet specific section, the "typical application" reference design, or the evaluation board schematic. The datasheet will state if the pin should be open-collector/open-drain or not.

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