# SDRAM on opposite side of board with respect to uC

Just a quick question. Is it advised against to place a high speed memory device on the opposite side of the PCB with respect to the microcontroller? And if it is ill advised, how is it possible to used the same data/address bus for a few different physical memories? There would be no way to route the inner traces that have been sandwiched in by the other address/data lines.

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It gets done, but it can be a manufacturing hassle to place parts, especially high density ICs, on both sides of the board. Most would resort to more signal layers first; though if it's to be handmade on a 1/2/4 layer board, you can go ahead and put the memory on the back rather than pay for more layers. –  Chris Stratton Jan 10 '13 at 20:39
@ChrisStratton This is handmade and 4 layers, so placing parts isn't the biggest issue. I was more worried about signal integrity because of vias which would create bad current loops at high frequencies. (I'm aiming for 100-150Mhz on these lines) –  Koma Jan 10 '13 at 22:23

In theory it is possible. In practice, it sounds better than it really is.

It only really works when the chips are not BGAs. But these days almost all modern CPU's and SDRAMs are in BGA packages. Putting BGA's on opposite sides of the PCB can be problematic because you quickly run out of room for pads and vias. But the benefits of using BGAs (reduced pin inductance, etc.) is very nice for meeting EMI regulations and I tend to choose BGAs over other packages.

So the only time that you can really put the CPU and SDRAM on opposite sides of the PCB is when your CPU and SDRAM are old-ish. Switching to BGAs and modern parts can often save you PCB space over those parts anyway, so you are not really gaining anything by sticking with the old technology and non-BGAs.

Disclaimer: I do know of some exceptions to what I claim above. Sometimes BGAs are just not an option.

Sharing the same address/data busses for several physical memories is not difficult, as is routing the signals. But you do have to pay attention to how your traces are laid out and terminated. You might also have to add layers to the PCB to make room for routing.

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So I am restricted to TQFP and similar packages (8mil) because of the type of chips and lack of resources to solder BGAs. With this in mind, I am planning on using 4pcb's 4-layer deal. 4-Layers, FR-4, 0.062" 1 oz. cu plate Lead FREE Solder Finish No Slots (or overlapping drill hits) Min. 0.006" line/space No Internal Routing (cutouts) Min. 0.015" hole size I believe that this works out for me with respect to trace width, but I'm more worried about vias. I've read that vias make right angles which are very bad for high speed signals. (buildup of current at the corners). –  Koma Jan 11 '13 at 3:26
Also, would alternating adjacent pins on top/bottom layers be bad? With respect to transmission, a 1ns rise time would give me 2inches as the maximum trace length before reflections. I will probably around 2 or 3 inches for trace length. In addition, the branching of the address lines will cause other transmission problems and impedance matching branches is very difficult. –  Koma Jan 11 '13 at 3:29
Right angles are not bad for signals in 99.9% of the PCBs. Usually the signals need to get above 1 GHz first, and even then right angles are not as important as other things. Normal signal integrity things like trace impedance, signal return paths, and termination (with your added complication of branching address lines) should be your top concern. Alternating top/bottom layers is not at all bad if you pay attention to these issues. –  user3624 Jan 11 '13 at 13:44