Update: node name "alias" (aka synonym) resolution seems to work fine in simple circuits... even though one of the two names "goes away" it's doing what I'd expect by namely referring everything to the correct single node. It's circuits involving subcircuits and models that aren't resolving synonyms as expected (particularly synonyms that appear within the library). At this point I'm trying to determine if it's a quirk of the libraries I'm using or if it's a limitation of SPICE when it comes to subcircuits and libraries.
I am working in LTspice though this question probably applies to SPICE as well. I have a small circuit I'm creating, however some components want VCC defined while others want VDD defined. In this case they are the same voltage (VCC=VDD=5V) from a single output power supply.
You cannot apply more than one label directly to a node. If you take a node, add a short trace and label one VCC and the other VDD, you of still end up with only one of those names actually getting defined in the netlist, since it's equivalent to one node and only one name is allowed per node.
There are hacky workarounds but I'd like to label my circuit correctly without any trickery (e.g., I could use an infinitesimally tiny resistance to create a second node to apply the "duplicate" label to).
Is there a mechanism in SPICE / LTspice for aliasing a node name to another name, such that the two may be used interchangeably?
Bonus: if not, why not? If SPICE can collapse a complex circuit into equivalent nodes (not exactly a trivial task) I'd think it could easily deal with simple name aliases...
Edit2: Perhaps a better bonus question would've been: why doesn't creating what appears to be an alias (either directly, by labeling the same node with two names, or indirectly by labeling each side of a jumper) throw an error in LTspice? For that matter, does it even throw an error in SPICE? (I suspect it does not given they are related at the core...) I came here because I spent a fair amount of time scratching my head wondering why one of the two names would get ignored as if it was never there... an error message from SPICE / LTspice would've helped immensely.)
Edit: The circuit is based on functional models of 7400- and 4000-series chips, not DIP models of them (thus there are no "pins" on the blocks for VCC / VDD (7400 uses VCC, 4000 uses VDD by convention)... you simply define them for the circuit as a whole and in this case I'm modeling the power supply as well). In short, drawing the power wires isn't an option anyway.