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I'm pondering over a stackup for a 6-layer board using a couple of PCIe connected ICs.

My first idea was to use the following Stackup:

  1. Signal
  2. GND
  3. Power (Multiple power supplies, so it's a split plane)
  4. Signal
  5. GND
  6. Signal

So the outer layers would have a good solid groundplane, instead of having a split-powerplane as reference-plane for my PCIe-Signals. Also there will be some decoupling between layer 2 and 3.

Now I've seen that the "normal" stackup suggested is:

  1. Signal
  2. GND
  3. Signal
  4. Signal
  5. Power
  6. Signal

Whats your opinion on this?

share|improve this question
If you haven't already read it, hottconsultants.com/techtips/pcb-stack-up-1.html provides a very good overview of tradeoffs among stackup choices various numbers of layers – vicatcu Jan 17 '13 at 19:35
I've done several PCIe (up to 3.0) boards using a similar stack-up as the one you define (although more layers). You should be fine with that stack. You definitely don't want the split plane as your reference. Plus here you already via down to the bottom and you can put your dc blocking caps for the lanes down there too. – Some Hardware Guy Jan 17 '13 at 19:43
@SomeHardwareGuy can you recommend a common stack (in regards to cores+prepregs) which would be easy to manufacture for most pcb houses? – Nico Erfurth Jan 18 '13 at 8:31
up vote 1 down vote accepted

So long as you pay attention to trace impedance, signal return paths, and all of the other usual signal integrity things then you can really do anything with the stackup. Of course, some stackups make it easier to do...

I have done several PCIe designs and what I do is this:

  1. Signal
  2. Ground Plane
  3. Signal
  4. Signal
  5. Power Plane
  6. Signal

The spacing between all layers, except between 3-4, is small. Maybe 3 to 10 mils (not mm). The reason for this is to give the signal layers a low trace impedance with respect to the planes. This also means that the space between layers 3 and 4 is large-- large enough to make your total PCB thickness correct. You will have to do the math to figure out what exactly works for you-- balancing trace width with trace impedance and stackup height.

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Could you recommend a layer-stackup (prepreg and cores) which is "common" enough to not cause problems in production? I'm targeting 2-3k pcs/yr so it's not really high volume stuff. – Nico Erfurth Jan 18 '13 at 8:29
@David Kessner -> this is a nice stackup, since GND is also spilled(using polygons) over all signal layers at the end of the routing. – Socrates Jan 18 '13 at 11:30
@Masta79 The best thing to do is to ask your PCB shop. I could tell you what is common, but your PCB shop might stock other thicknesses. – user3624 Jan 18 '13 at 13:43

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