6-Layer Stackup for PCI express design

Question

I'm pondering over a stackup for a 6-layer board using a couple of PCIe connected ICs.

My first idea was to use the following Stackup:

1. Signal
2. GND
3. Power (Multiple power supplies, so it's a split plane)
4. Signal
5. GND
6. Signal

So the outer layers would have a good solid groundplane, instead of having a split-powerplane as reference-plane for my PCIe-Signals. Also there will be some decoupling between layer 2 and 3.

Now I've seen that the "normal" stackup suggested is:

1. Signal
2. GND
3. Signal
4. Signal
5. Power
6. Signal

Whats your opinion on this?

Answer 1

So long as you pay attention to trace impedance, signal return paths, and all of the other usual signal integrity things then you can really do anything with the stackup. Of course, some stackups make it easier to do...

I have done several PCIe designs and what I do is this:

1. Signal
2. Ground Plane
3. Signal
4. Signal
5. Power Plane
6. Signal

The spacing between all layers, except between 3-4, is small. Maybe 3 to 10 mils (not mm). The reason for this is to give the signal layers a low trace impedance with respect to the planes. This also means that the space between layers 3 and 4 is large-- large enough to make your total PCB thickness correct. You will have to do the math to figure out what exactly works for you-- balancing trace width with trace impedance and stackup height.