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I'm looking for a good schematic capture checklist to use when reviewing schematics. This is for the usual issues such as check that you don't have similar but different nets (e.g. GND and GROUND) that are separate and style/readability issues (e.g. no 4-way ties). Either your list or a link to an external one would help.

For what it's worth, I'm using DX Designer, so if you have specific checks you run, let me know about that too.

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One I found online was from Avanthon Engineering, Inc. – Brian Carlton Nov 12 '10 at 18:00
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I don't agree with you. The argument for the use of checklists is that any human can failure, even the experts. Please, read "The CheckList Manifesto" (gawande.com/the-checklist-manifesto) to understand why. – Daniel Grillo Nov 12 '10 at 19:30
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I mean, a program won't catch everything. I verify all my net namess before going to routing, for example, even though gEDA has the ability to search for net names. – Thomas O Nov 12 '10 at 22:26
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Hah! I verify my netlists by keeping the schematic in mind while routing the board. – Connor Wolf Nov 13 '10 at 0:36
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I do the same, but it never hurts to check it once you're done... – Thomas O Nov 13 '10 at 1:22
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2 Answers

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Functionality:

  1. Check symbol pinouts, especially for new symbols and parts with multiple packages.
  2. Review vendors' latest data sheets and errata to see if anything has changed since you downloaded it.
  3. Have the vendor's FAE review the part of the schematic that uses their part(s)
  4. Label all power nets consistently. Makes it easier to find them during the PCB design.
  5. Check for on- and off-page connections, using the tool's DRC.
  6. Check for same net on different pages without on/off page, using DRC.
  7. Avoid strange symbols (e.g. #) that other tools may not handle well.
  8. All upper case.
  9. Show revisions. Show when drawn, whom by.
  10. Think about EMI/EMC/FCC/UL/CE, etc.

Ease of use:

  1. No 4-way ties.
  2. Label all important nets, e.g. clocks, power even if only going between 2 chips. Makes checking if the clock's serial termination resistor is near the clock driver. Also good for high-current signals that aren't the main power rails, e.g. around the FET or inductor in a DC/DC switcher.
  3. Table of contents on an early page; block diagram on an early page.
  4. Show power and ground on schematic symbols.
  5. Show unused gates/resistors from multi-gate/resistor packages.
  6. Show active low pins on symbol; show active low nets consistently.
  7. No extra connection dots where there isn't a connection.
  8. Not larger than B-sized (11x17) or metric equivalent.
  9. Bus common signals.
  10. Connect by name on-page if it makes it more readable. Similarly don't wire power/ground all over the page, use multiple power/ground symbols.
  11. Inputs on the left, outputs on the right.
  12. Everything on a grid.
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That was a layout question, this is about schematics. The reason I say this is when copies are made it can be hard to tell between two wires crossing, but not connecting and a 4-way tie where they connect. – Brian Carlton Nov 12 '10 at 20:53
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If you have trouble distinguishing between 4-way wire crossings and junctions, your EDA package sucks. – Connor Wolf Nov 13 '10 at 0:38
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All software sucks. – XTL Nov 13 '10 at 10:05
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@XTL - Yes, but there are different types of suck. There is "How to make 350 different options available intuitively while only using 18 pixels of menubar space" suck, and there is "Can't figure out how to draw a dot where two lines intersect" suck. Once is significantly easier to fix than the other. – Connor Wolf Nov 17 '10 at 8:36
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@KevinVermeer: I have some references for 4-way ties -- I listed them at Wikipedia: "circuit diagram". – davidcary Mar 13 at 15:42
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up vote 4 down vote

Here is another one from Atlantic Quality Design.

Added 11/16/10: And one from chipcenter.com that was updated by Voler Systems. Both cover more than just schematics.

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can you bring over the data from some of these lists you have found and cite them? – Kortuk♦ Mar 16 '12 at 21:37

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