Take the 2-minute tour ×
Electrical Engineering Stack Exchange is a question and answer site for electronics and electrical engineering professionals, students, and enthusiasts. It's 100% free, no registration required.

This circuit's job would be to test if two circuits behave identically, not taking into consideration calculation time differences between the circuits up to a timeout. Here is my attempt, I have not tested this because I do not have the physical circuitry with me or a good simulator.

Circuit Equivalence Tester

share|improve this question
1  
You realize, I hope, that as soon as the circuits to be tested contain anything but combinatorial logic (e.g. flip flops), the problem becomes unsolvable. –  microtherion May 16 '13 at 5:21
    
True, but for pure combinational logic this is basically the same concept as JTAG boundary scan: although AND and XOR are the wrong way round in the diagram. –  pjc50 May 16 '13 at 5:49
    
why are AND and XOR the wrong way around, I'm using the ANDs to mask the time when the circuits are still calculating. XOR would determine if they are different, and the latch holds its state if there ever is a difference. Also, if the two circuits receive the same inputs and are expected to be equivalent, why would something like this not work for a sequential circuit? –  0xFFF1 May 16 '13 at 10:38
    
I guess you could put the ANDs after the XOR, in which case you'd only need one AND, with inputs from the XOR and the negated clock. –  0xFFF1 May 16 '13 at 10:40

Your Answer

 
discard

By posting your answer, you agree to the privacy policy and terms of service.

Browse other questions tagged or ask your own question.