Capacitance can be shown to be equal to material permittivity times surface area divided by distance between the plates.
Now for an electrolytic capacitor you have two foil plates with a gel in between to create an insulating layer the manufacturer applies a bias voltage which creates an oxidisation layer.
The important point is that the thickness of this layer is dependant on the applied voltage. The bigger the voltage the wider the layer and the smaller the capacitance.
Several years ago I was advised by am application engineer from NCC (Nippon ChemiCon) that for best life / minimal capacitance drift a capacitor should see between 50% and 75% of its rated voltage in normal use. I have no idea what this is based on but is still a rule of thumb I work to.
If the voltage is too high the insulation layer will widen and capacitance will fall; too low the insulation layer shrinks and capacitance grows.
I have always allowed for ESR doubling over the expected life of an electrolytic capacitor but I design switch mode PSUs so I drive electrolytics quite hard. I have never considered the ESR of an electrolytic given an easy life.