I'm trying to get some analytical feeling for the use of ground pours on bottom and top layer in multilayer boards with proper stackups such as (for example).
Every signal net has an adjacent ground plane and the internal signal layers are shielded if the power planes are carefully laid out.
I'd like to take an example. Every now and then you see DDR routing areas poured with bottom and top ground pours on multilayer boards but the benefit seems to be marginal from an EMC perspective and maybe even degenerative with regard impedance matching for the top and bottom signals.
The pours in this situation won't add any shielding to traces bellow since there is already a ground plane just bellow. These pours also add to the asymmetry of the copper distribution which increases the odds of the board bending during heat treatments. They also make rework harder due to higher thermal conductivity.
A upside for these pours though in some cases is increased thermal conductivity around dissipative electronics.
So overall is there any analytical evidence for pouring on top/bottom layers in multilayered boards with proper ground planes for other reasons then distributing heat from power hungry packages ?