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I'd like to hear some explanations as to how the Arduino Duemilanove resets the ATMega328P over USB through the FTDI FT232R transceiver.

I know it involves the IDE playing some games with the DTR serial handshaking signal. After looking at the schematics, what I'm really interested in getting a better handle on is how the circuit works:

        100nF           10kOhm
DTR -----||------+------^v^v^----- VCC
                 |
                 +--/RESET

The 10k resistor is the usual pull-up on the reset line. So what does the capacitor accomplish in this circuit?

As a sidenote, I used this as an excuse to try and learn/use LTSPICE, so I'm no pro at this tool. I modeled it in LTSPICE as follows, but it looks to me like the /RESET signal just matches the DTR signal exactly, which doesn't really make sense to me. I modeled the DTR signal as a Pulse Voltage source, maybe that's the wrong model. Is it the nature of the FTDI's DTR driver (e.g. perhaps it's open collector) or the internals of the /RESET pin on the MCU that are not present in the circuit I've drawn that make this all hang together electrically?

alt text

Also, here are some of the relevant links to datasheets and schematics for reference.

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1 Answer 1

up vote 3 down vote accepted

IIRC the cap is wired to /RTS not DTR.

When /RTS is high there is 0V across the cap. When /RTS goes low the cap can not change voltage instantaneously so the reset line goes low. The cap charges through the 10K resistor. Once the reset line is above the reset threshold the uC program starts.

@LouisDavis referenced this page, which states

The ATmega168 is reset by pulsing its reset pin to GND. ...by setting the DTR line to LOW ... the reset pin gets sucked to LOW until the capacitor is charged through the internal pull up resistor and R1 - which resets the chip.

Simulated:

Auto-Reset
VDTR    1 0 PWL(0 5 0.5m 5 0.000500004 0 1m 0)
Vcc 3 0 5
C1  1 2 100n
R1  3 2 10k
.control
delete all
tran 10n 5m
plot v(1) v(2)
.endc
.END

V(1) is DTR or /RTS and V(2) is /RESET
alt text

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@jluciani, Where are you seeing a cap on RTS? There is a not populated resistor on RTS. The capacitor (C13) is wired between DTR (FT232L pin 2) and the MCU's reset pin... –  vicatcu Jan 24 '11 at 3:27
    
@jluciani, Your explanation makes good sense. I like your explanation regarding no instantaneous change in voltage across capacitors. That's a handy base principle to keep in mind. Part of me wonders why both sides should drop to zero then one side recharge, rather than the DTR side simply discharging through the internal resistance of the DTR pin? Also why did you use a PWL source instead of a PULSE source in the sim? –  vicatcu Jan 24 '11 at 4:13
    
@vicatu, I do not know the period or duty cycle of the pulse, and a simple drop to 0V verifies all assumptions nicely. –  tyblu Jan 24 '11 at 4:32
    
@tyblu, yes I fully intend to accept this answer, I'm just hoping for some elaboration in response to my comments above. –  vicatcu Jan 24 '11 at 16:20
    
@vicatcu the input resistance of any digital input is very high. Not much current will flow. The charging current can only come from the digital output or the 10K. –  jluciani Jan 29 '11 at 19:36
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