I can't speak about FRAM (ferroelectric memory), but any technology that uses floating gates to store charge — any form of EPROM, including EEPROM and Flash — relies on electrons "tunneling" through a very thin insulating silicon oxide barrier to change the amount of charge on the gate.
The problem is that the oxide barrier is not perfect — since it is "grown" on top of the silicon die, it contains a certain number of defects in the form of crystal grain boundaries. These boundaries tend to "trap" the tunneling electrons more or less permanently, and the field from these trapped electrons interferes with the tunneling current. Eventually, enough charge is trapped to make the cell unwritable.
The trapping mechanism is very slow, but it is enough to give the devices a finite number of write cycles. Obviously, the number quoted by the manufacturer is a statistical average (padded with a safety margin) measured over many devices.