Digital circuits that adds values

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Muxes, Adders, Comparators, and Gates

This question is actually from one of my previous discussions, which I still don't understand how to implement. The goal is to use abstraction to design a circuit, which converts two-digit ASCII ...
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2answers
53 views

Bit Slice Checker

I'm attempting to use bit-slice design, to implement a circuit which checks if an n-bit binary number A has an even number of 1's in its binary representation. I've decided that the circuit should ...
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2answers
92 views

Which 4-bit Binary Number Is Greater?

My Task I'm working on an extra work question our teacher assigned us from the book. Design a combinatorial circuit that compares two 4-bit unsigned numbers A and B to see whether B is greater than ...
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2answers
87 views

What would be the output of A = 0100 and B = 0111 with S = 1 in a 4-bit binary adder-subtractor?

I understand S = 1 means subtraction and S = 0 means addition. So then, the output would be the result of 0100 - 0111. But since it's negative, I'm not sure how it would be represented. I know the ...
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gate delay for 4-bit ripple carry adder [duplicate]

How can I find Gate Delay for bit 1 of the sum by a 4-bit ripple carry adder? can anyone please explain me this in detail i am confused a lot in this and 4-bit look-ahead carry adder thanks.
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1answer
35 views

How to find gate delay for 4-bit look-ahead carry adder?

How can I find Gate Delay for bit 1 of the sum by a 4-bit look-ahead carry adder?
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1answer
31 views

Design a full adder of two 1-bit numbers using multiplexers 4/1

How can i implement the full adder of two 1-bit numbers using only multiplexers 4/1? I created a truth table for a one-bit full adder, which looks like this: A = first bit B = second bit Pu = bit ...
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6answers
180 views

Batteries in parallel vs voltage signals in parallel

From a practical point of view, when you connect two audio signals to one speaker the result is that both audio signals can be heard. That means the two voltage waves were added, correct? However, ...
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87 views

How can I use 3-input NAND gates to create a 1-bit full adder?

I have already implemented a 1-bit full adder with 9 2-input NAND gates. Out of curiosity, if the number of inputs on a NAND gate changed, say from 2 to 3, would the truth table and full adder ...
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2answers
72 views

Design of a basic half-adder

I know that a half-adder is a combination of the gates: XOR, AND. But how are they combined? And can you give a example and explain which one is the XOR and which one is the AND.
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1answer
185 views

Signed Addition of two std logic vectors while looking for overflow and carry

I have what I think to be a working implentation for finding the sum of two signed 32 bit (std_logic_vector) vectors in which I chose to expand the result to always have 33 bits so as to preserve the ...
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1answer
46 views

Adder-Subtractor Circuit

For the above question I got the answers: a. SUM = 0110 | C = 1001 b. SUM = 0100 | C = 1010 Are these answers correct and how is the overflow calculated?
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1answer
64 views

Truth Table, Full-adder

I'm trying to solve two questions that I am unsure how to approach. I know boolean means true/false but that's about it. The question reads: "A boolean equation in sum-of-products can be minimized ...
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1answer
59 views

Building a 2-bit adder with a propagation delay of at most 2 gates

An XOR-gate itself counts as 2 gates, so if I use an XOR-gate the delay would already be 2. I have no idea how to do this, as a full adder for one bit already contains 2 XOR-gates (or 1 XOR-gate, 1 ...
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1answer
113 views

How would you make a 3-bit binary adder that adds two instead of 1?

I am trying to make an asynchronous adder that holds three bits and adds two to the number. Can someone help? A Google search shows nothing and I'm having a hard time visualizing how to make the ...
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1answer
45 views

Help designing a serial adder [closed]

I need to build a circuit that adds two n-bit 2's complement numbers. the two numbers have to be stored in shift registers. The circuit should start with the least significant bits of each number and ...
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0answers
82 views

4:2 compressors gate count increasing but area decreasing, How?

From literature's I got below definition, ...
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1answer
112 views

Parallel MAC unit based on modified booth algorithm

The below diagram is the parallel MAC structure. In parallel MAC both partial product addition and accumulation take place at same time. The partial product summation + accumulation unit of above ...
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1answer
82 views

OLA adder and signed digit vhdl design problem

I have implemented the following online adder for signed digit using vhdl code and I have simulated my design according to the example table shown in the figure attached the problem is I am not ...
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2answers
529 views

2-bit adder implementation

How can I implement this 2-bit adder circuit: (source) Onto http://www.neuroproductions.be/logic-lab/ or logic.ly? After several attempts (and in spite of the half adder and full adder working) I ...
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222 views

Spikes in full adder Spice netlist

I currently have a 1 bit full adder waveform which has the following circuit and here is the following netlist which I will simulate via Hspice ...
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0answers
210 views

How ALU Perform decrement operation using LOGIC Zero

I google many ALU Block diagram for decrement operation.all same as shown below. This 1 bit alu perform 8 operation depending upon select line status Theoretically all operation seems works ...
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2answers
96 views

Find x cubed with half adder

My excercise is the following: Make a circuit which outputs X^3 of two bit input of X. Use the lowest number of HALF ADDERS as you can. I don't really understand ...
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1answer
76 views

Sum 4 numbers, 1 bit each, with three full adders

My excercise is the following: Make a circuit which sums 4 binary numbers, one bit each, with three full adders. My solution was the following (sorry I can't ...
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2answers
186 views

How can I add three AC signals?

I have three light sensors which outputs appropriate AC currents with respect to light intensities. I only have one pin left for my ADC IC that I have on my board so I can't sample three sensors using ...
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0answers
136 views

ALU using full adder and MUX [closed]

I am trying to implement a 1 bit ALU on Tanner EDA. I have a separate full adder and 2:1,4:1 MUX circuits. My question is: How do I interconnect the full adder to the MUXes, so that it work as an ALU? ...
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112 views

Integrated Circuit Multiplier Circuit Problem

I'm developing an 8bit x 8bit IC signed multiplier using FULL adder cells. Once I get partial products, I add them together. The problem I have occurs in this stage, adding of the products. This is ...
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1answer
125 views

Can anyone explain to me how a carry select adder works?

Doesn't get more complex then the question above. I've been looking through textbooks and using google and I feel like the explanations are not suffice or unclear. Can anyone explain this to me well?
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2answers
787 views

1bit Full Adder Cell in IC not working as supposed?

I got an adder cell, which in IC mirror layout is this: EDIT: Transistor-level, standard adder circuit: Which I actually made in IC like this: It's not working as it should! I labelled it ...
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1answer
133 views

Synchronizing multiplier with adder to form mac

I have designed an 8-bit multiplier in Verilog which takes a maximum of 8 clock cycles to give the product. I have also coded a 16 bit adder based on combinational logic. I now want to integrate the ...
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1answer
86 views

Why is my adder giving me the wrong output?

So I made this circuit right from my professor's notes. It is a carry ripple adder. I've been testing it out and one of the problems it has is this: When you turn on all three inputs, it does not ...
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69 views

How do I minimize the size of a 3-input parallel adder?

Currently this alu uses 24 logic elements, most likely from the adders. I'm wondering if there is any tool in Altera/Quartus I can use to minimize this? For my design, multiplier and RAM modules are ...
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1answer
141 views

How do carry save adders work?

I thought I understood the concept but wikipedia has confused me. There are two outputs because one's for a partial sum and one's the carry bits. But why must it be used to "compute the sum of three ...
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1answer
2k views

Design of a 1-bit adder-subtractor with additional carry/borrow input

I have to design a 1-bit binary adder/subtractor unit that can both add or subtract two input values A and B depending on a control input C (it is assumed that two's complement is used). Also, the ...
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2answers
142 views

does this design look suitable for a 4-bit adder

I am working on a project that will include a basic 4-bit adder, I have designed a layout is Adobe Illustrator and would like people to check over it to see if it looks like it should work. I am very ...
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1answer
171 views

Building a small 4-bit adder on a breadboard

I am very new to using IC and basically a breadboard in general, but I am doing a project on how computers add and thought it would be nice to have a practical demonstration. My main question is, for ...
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1answer
158 views

Working of Prefix Adder

I am trying to understand the working of Brent Kung adder, but I have not been able to. All that I see in tutorials is just the figure above for carry generation. Can anybody explain it to me with ...
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41 views

3 bit x 3 bit multiplier. How to add the 3 partial products? [duplicate]

I want to implement a circuit for a 3 bit x 3 bit multiplier and i am confused as of how im supposed to add the 3 partial products. I know it should be like that : ...
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2answers
164 views

Add fixed voltage to variable voltage

I want to add two voltages. I have tried using the Op-Amp adder here. The resistor schematic before the summing amplifier contains resistors in parallel which would average the voltage. My problem ...
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211 views

How to compare carry-lookahead and ripple-carry adders?

I am a bit stuck with the concept of carry-lookahead adder so I'd like to compare it with another concept I'm more familiar with: the ripple-carry adder. I'm trying to make some basic math comparison ...
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2answers
235 views

Is there a better way to plan a circuit to square a 3 bits binary number?

I need to plan a circuit that will square a 3 bit binary number: $$\{Y_2, Y_1, Y_0\} \rightarrow \{S_5,S_4,S_3,S_2,S_1,S_0\} $$ I thought of the common way we multiply numbers and used it to plan the ...
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1answer
112 views

Complexity comparison of an adder and a multiplier

I have two algorithms with different requirements of addition and multiplication operations as follows: Algorithm 1: 100 additions 200 multiplications, total = 300 operations. Algorithm 2: 300 ...
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1answer
106 views

Design of an adder circuit

I have a adder circuit consisting of carry look ahead adders. However, I am not allowed to use the generate function to determine the sum of the two numbers. I am allowed to use basic logic ...
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82 views

Construct a 16bit Full Adder for the last bits. A15 B15

How do I implement a Full Adder of 16bits for the last bits. That is, A15, B15. How does the truth table and the circuit look like for this?
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1answer
5k views

How to calculate Gate Delays in normal Adders and Carry Look Ahead Adders

In my textbook the gate delays for the n-bit ripple adder is given as \$ 2n \$ for \$c_n\$ bits and \$ 2n-1 \$ for \$ s_n-1 \$ for the circuit as shown below: But, for a 4-bit Carry Look Ahead ...
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2answers
180 views

Ultra low power adders and multiplier

I am working on a low frequency 30 khz module that needs to have an ultra low power consumption. The problem is the research focuses on improving the performance of the adders and multiplier and ...
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1answer
379 views

What happens to a 32-bit input when a gate will only output 1 bit?

For example, suppose I have a combinational circuit that takes 32 bits as input and outputs 1 bit that is equal to 1 if the 32-bits are equal to 0, and outputs 0 if the 32 bits are anything else. How ...
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1answer
6k views

What are carry-lookahead adders and ripple-carry adders?

I see carry-lookahead adders and ripple-carry adders terms being used often. I have no idea what either means (nor the type of architecture they describe). Can someone please explain what each one ...
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445 views

What is the minimum amount of 1bit Full Adders required to implement the equation 4X + 3Y + 13?

Using 1bit FAs and 0/1 constants only, while X(x1,x2,x3) and ...
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1answer
180 views

Why is carry on for an adder that is simply on? [closed]

I've understood that the behaviour is correct when I make a simple adder: But why does carry on light up just because I switch on the + operation for my 4-bit system? ...