A digital signal that goes high and low at a specific frequency.

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How to multiply base system clock using .xdc constraints in Vivado

This question may be ridiculously rudimentary but I have been going through Xilinx's available guides and videos tearing my hair out... my problem is simply this: I want to use the base 100Mhz clock ...
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46 views

It is better to have a negative clock skew?

Is it better to have a negative clock skew? Why? If we compare it with a positive clock skew, which is better?
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1answer
34 views

How to use an H-clock tree in a pipelined adder

This is for a lab at my university. Normally I don't have a problem with these things, but this one is poorly written and the professor hasn't discussed the H-clock tree, which is where I'm getting ...
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1answer
178 views

What parts could be labeled XT and be near a Clock of a microcontroller

An ice cube maker stopped working with the symptom that the temperature cycles are getting shorter and shorter. I suspect that the microcontrollers clock is not working properly. I desoldered a part ...
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40 views

VHDL - does sequential component need to know whether input comes from clock?

If I have some component that represents a sequential circuit (or sub-circuit), e.g. an SR-latch within a D flip-flop, do I need to know which inputs are clock-based? Often sequential components seem ...
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24 views

Clock distribution among multiple cores in an arm based SOC

I have a general doubt of how clock is distributed among cores in ARM based SOC, for example take an ARM Cortex A7 MPCore based SOC the soc i was looking at is based on above core and is a quad core ...
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60 views

How to get equal number of clock cycles before ISR on an AVR

While writing a time critical piece of code for an Attiny13, I figured I could use the rising edge of an input as a trigger to read in some self clocking data. However, the number of clock cycles ...
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27 views

cmos output buffer currents

In a cmos driver what controls the amount of current it can source or sink? Is it the combined RDS on of the internal FETs? When you try to pull a line low I guess there's voltage stored in the ...
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1answer
68 views

Can I use an AND gate before a clock input?

Can I use an AND gate with a clock input? For example, in the picture below, I have a positive-edge D flip-flop. I'm using an AND gate with the Select_chip input and the Clock input but I'm not sure ...
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28 views

Using two 4-bit registers, AND and OR gates and inverters, what would be a one bit slice of the logic diagram that implements all of the following?

C0: R2 <- 0 (clear R2 synchronously with the clock) C1: R2 <- R2' (complement R2) C2: R2 <- R1 (transfer R1 to R2) The control variables C0, C1, C2, ...
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58 views

1/6 Clock Frequency Divider

How would I design a circuit made of rising edge triggered flip flops and inverters to make its output 1/6 of the clock frequency. Cheers
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27 views

How to use external clock on STM32F205VC?

I'm using VisualGDB for stm32F205VC programming. I have an external clock on my board connected to OSC_IN and OSC_OUT that I have to use. How to switch to it?
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36 views

How the clock runs on modern processors? [duplicate]

I would like to understand how the clock in modern processors. It is delivered via hardware or via software? I understand how the clock works of a microcontroller with an external crystal or even ...
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2answers
82 views

Numerically Controlled Oscillator (NCO) Sample quantity

Ive been doing some research on NCOs and some initial information (or lack of information) is bugging me. Ive read a few articles on this topic: FPGA based NCO Blog on NCOs But i still don't ...
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1answer
30 views

Clock switching hangs when switching back to original source

MIGRATED TO EE.SE http://electronics.stackexchange.com/q/159634/69868 I am currently working on a project where the clock needs switching between the Primary Oscillator with PLL (POSCPLL) to the FRC ...
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23 views

Clipped sine input for HSE clock input on STM32F303?

I am using a STM32F303 and need a very high stability clock ie around 1ppm over temperature. One of the modules I am looking at outputs what is described as "clipped sine". Can this drive the ...
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3answers
70 views

Adjustable Clock Generator between 15.5 MHz and 17.4 MHz

I'm looking for an inexpensive component to generate frequencies between 15.5 MHz and 17.5 MHz. My intention is a medium-run product (a few hundred units). The issue is that I would like to change ...
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5answers
1k views

What components or circuitry exist that can provide extremely high speed, accurate clocks?

I've been curious for awhile now about doing some high speed projects, such as measuring time differences of radio wave reception, and was wondering if there exists components that provide clocks much ...
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23 views

JK flip-flop and sequence network

State diagram of the sequence network S looks like the following for a jk flip-flop: Is this the right truth table for it? ...
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0answers
22 views

How to choose clock frequency in Dynamic Logic?

I want to design a full adder using dynamic logic but I don't know how to choose the frequency of operation. I know the following about dynamic logic clock: The clock frequency is crucial for ...
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2answers
239 views

How to check frequency of MSP430 clock?

I'm working on a project in which an MSP430 is used to provide the timing for some stuff where accurate timing is important (it can be off by 10%, but not by 2x). This is driven by the timer A0 ...
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1answer
38 views

External clocking of MSP430 with variable duty cycle clock

I'm going to clock an MSP430FR5969 using a PCF2127 RTC. The PCF2127 can output 32.768kHz at a duty cycle between 40%-60% and 16.384kHz, 8.192kHz, etc at exactly 50%. I will use the MSP's DCO system to ...
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47 views

ENC28J60 on a XMega along with USB

I'm trying to port the TuxGraphics webserver example to the ATxmega128A3U for the ENC28J60 This is my first time using the xmega so I need help making sure all my SPI registers are set correctly and ...
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2answers
69 views

XMega Get Clock Speed

I'm doing some debugging on my project and I need to check if I'm setting my external crystal correctly. I have the ability to print out to a serial monitor via usb, is it possible to retrieve the ...
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51 views

Mueller Muller CDR

For a clock data recovery in a reciever a phase detector is used. In my case I want to understand how the Mueller Muller CDR works. And also what its advantages and disadvantages are. The ...
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1answer
504 views

Clock divider circuit with flip D flip flop

I am using D flip flops in my clock divider circuit. I have started with one FF and moving up with the number of divisions I want to have in my clock. This is how I want my D ffs to work. Now I ...
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43 views

AMBA Bus Architecture and its clocks

I Have Few Doubts on AMBA Bus Architecture and its clocks I am working on Propriety SOC with non-detailed docs , the SOC is based on ARM9 Architecture which has peripherals connected to it through ...
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1answer
115 views

ATmega162 fuses to select external clock 12Mhz?

Could anyone tell me how I could change the fuse bit, so that my ATmega162 uses 12 MHz external crystal. Once, I made the changes in the AVR fuses wrong the AVR went dead. That is why I need ...
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1answer
101 views

How can two separate devices send clock data to a shift register IC?

I'm using a microcontroller to clock a byte into a 74HC595 shift register and latch it. It then sends a signal to the other device which send 8 clock pulses when it is ready to receive the byte. So ...
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1answer
33 views

clock drivers low current consumption

I am trying to drive a 30 pF load cap (1 pF times 30 or 2pF times 15 or so on) from a ring oscillator generated clock. The frequency I want is 250 Mhz. What is the best approach to keep the input ...
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2answers
63 views

Why prescaler doesn't give 50% duty cycle pulse

I am new to embedded electronics. While reading the datasheet of ATmega328P, I saw this when timers and their timing diagrams were given... I wonder why clk/8 is not of 50% duty cycle...Please help ...
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1answer
133 views

Help for Changing the ATMega328's clock source to External Clock

I want to change the fuse bits of the ATMega328 to operate with external clock (function/signal generator) instead of the crystal. The clock speed will be 8MHz. I have been trying for months and all ...
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104 views

Acquiring an accurate clock input for my computer

Building a timegrapher is quite straightforward, it is nothing more than a piezo transducer connected through to an amplifier. However, in order to actually utilize the results, one need an accurate ...
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1answer
35 views

150 MHz LVPECL Clock

I am using a SAS expander IC. In the datasheet, it is given to use a 150 MHz LVPECL clock with specifications as attached in the snapshot. Can somebody please explain how to use common mode & ...
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1answer
223 views

Conversion from VHDL to sysgen block diagram

I made my own custom board that contains a clock oscillator to drive an FPGA. I wrote some VHDL code. The script simply re-routs a 10-bit input (SIGIN) to the 10-bit output (SIGOUT) on the rising edge ...
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1answer
75 views

Making a clock cp for counter, using a photodiode

I need to make a device that counts light impulses, basicly a light detector counter, i need help with my counter cp, how to implement a photodiode(can't find phototransistors in the stores) to do ...
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3answers
501 views

What is the difference between processor clock and system clock?

In the TM4C123G Launchpad Workshop page 129, there is a note about power modes. This note differentiate between processor clock and system clock. So what is the difference between them ? Is this a ...
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62 views

Simple switching between clocks using oscillator disable pins

I am working on a circuit where I need to use different clock sources. I am using two HCMOS oscillators. Both oscillators have an disable pin. When disabled, the clock output buffer is placed in ...
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2answers
205 views

Can we observe addresses, data and other signals on the microcomputer buses by an oscilloscope, a LED or even an ordinary DC voltmeter?

Microcomputers are dynamic devices that are synchronized by a clock oscillator. So the signals (E, R/W, CS, A15-A0, D7-D0...) appear on their buses only for parts of a microsecond and, as the buses ...
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1answer
47 views

Switching tone on and off at 120 bpm not working

I am trying to make a design that toggles a sound at a rate of 120 BPM (once every .5 seconds), and I am using a 50 MHz clock. Here's the tone module: ...
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1answer
39 views

Access the internal clock on WLAN chips

I am trying to implement a localization method based on WLAN round trip time (RTT) ranging. Some of the papers I have read suggest doing ranging based on the MAC layer RTTs (beacons, ACK, RTS/CTS ...
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1answer
74 views

Crystal oscillator circuit

I am using following circuit and crystal is connected to XTAL2 and XTAL1 pin as shown below. Following IC is LPC2138, shown in image. I am using ADC chip ( DDC112 ) for A to D conversion. For ADC ...
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111 views

Taking the edge/ring off a clock signal with an RC circuit?

I'm designing a board for a hobby project where I am using a lattice machxo2 cpld as a system interconnect. The cpld needs to be clocked at 80-100MHz, and because I sprung for a cheaper cpld, it has ...
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2answers
93 views

Clock distribution gone wrong

I have had EMI problems in the past and I have decided to implement clock distribution with termination. I have a 25 MHz crystal that travels through a 50 \$\Omega\$ strip in the PCB and splits into ...
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1answer
57 views

ideal state of SPI MOSI and MISO pins?

Just wondering , If some how the MOSI and MISO tracks which connects the slave get cut. At that time, its disconnected from the slave. So if the micro controller tries to read data from MISO pin, ...
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91 views

24 Hour Counter JK Flip Flop

I'm trying to implement a 24 hour clock circuit using JK Flip Flops. I've gotten the minute part but I am having trouble designing the hours part, specifically the ones section. If it should count ...
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1answer
47 views

Spread spectrum 400 KHz

I got a 6-phase DC-DC converter. Fsw=400 kHz, synchronization by external clock(CPLD). I need a spread spectrum 400 kHz. What's the best way? All chips what I've seen before worked on MHz and above. ...
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87 views

Can SPI slave work with wrong clockphase setting?

In our prototype board, we have one 16-bit SPI based ADC [ad 7798] and an SPI based switch [adg1414]. Though some other guy has written the driver for it, and its also working. However when I ...
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189 views

“Clocking” and “Latching” with Arduino

I've just started using IC's, and am am trying to understand exactly how they work. I know that you must first clock in data to the shift register using Arduino's ...