A digital signal that goes high and low at a specific frequency.

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0
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2answers
63 views

VHDL:CLOCK DIVIDER with duty cycle

I want to generate a 15MHz clock from a 60 MHz clock. The 60 MHz clock has a duty cycle of 50%. The output clock of 15 MHz must have 25% duty cycle. How the following code needs to be modified to vary ...
1
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2answers
113 views

Why does the accuracy of my camera drop when I start using no-ops as delays?

I'm using an Arduino Mega to run three TSL1401R-LF Linear Scan Cameras in parallel. I got everything working and the camera were giving me different results based on how much light was hitting them (i....
3
votes
0answers
37 views

What is the difference between LPDDR2-S2 vs S4?

Looking at page 18 of the JEDEC spec on LPDDR2 LPDDR2-S2 also uses a double data rate architecture on the DQ pins to achieve high speed operation. The double data rate architecture is essentially ...
-3
votes
1answer
75 views

What are all these pins on the DS1307 RTC for?

I recently ordered a DS1307 RTC from ebay. Before, I did some research and found out that you only need 4 pins for it: Vcc, GND, SDA, and SCL. The one I got has many other pins like DS, BAT, SQ(I read ...
-1
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0answers
26 views

Syncing clocks at the rails

Basically, I need a clock that switches the PMOS (whose source is directly connected to the supply) and NMOS (whose source is directly connected to ground). I also have V_gs_max that I have to watch ...
0
votes
2answers
54 views

Introduce delays of alternating value for synthesis on hardware

My question here is with reference to this question previously asked. Currently, I am able to generate delays for each signal as desired. Next, I want to generate different delays for alternate ...
3
votes
2answers
92 views

Introduce delay on a single bit signal w.r.t. input clock

I have seen this question and removed the "#.." part of my code to introduce delay, since my code will ultimately run on hardware. Anyway, I am trying with counters and not able to introduce the ...
3
votes
6answers
713 views

What is the purpose of a tri-state pin in a Oscillator

I'm trying to interface this clock (32.768kHz Ceramic Surface Mount Crystal Oscillator datasheet), but I'm confused as to what to do with the tri-state pin. What is it's purpose in the oscillator and ...
0
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1answer
116 views

what is the frequency required to have all harmonics which have more than 10% DC value when we have 250 MHz clock?

A Digital board has a Unipolar square clock of 250 MHz. If the clock on the board at all places should have all the harmonic components which have more than 10% of DC value, the board has to be ...
3
votes
1answer
44 views

Difference between 32 KHz clock output load vs. clock input impedance requirement

I have a WiFi chip that requires a input impedance of > 100 kohms and < 5 pF as seen in the requirements table found in the datasheet below. I'm confused if this 5 pF requirement correlates to ...
-1
votes
2answers
90 views

Can i get continuity in the inputs of Op Amp (TL072)

Hello everyone, I have 1 doubt, i made in a protoboard an audio sequencer to provide CV(control voltage). The circuit is from [MFOS][3]. What happen is that the inputs of the op amp (TL072) are ...
0
votes
1answer
20 views

Programmable clock generator IC and reference circuit

I need a clock source for some data converters (DAC, ADC), and I would like the clock frequency to be as configurable as possible. I assume this would involve some kind of clock multiplier/divider, ...
0
votes
1answer
37 views

Rise/Fall time of GP Pins

Are rise/fall times typically affected by the clock speed. That is if I have a AVR at 16 MHz will it have a different rise/fall time than the same AVR at 32kHz?
0
votes
1answer
65 views

Carry-lookahead adder in VLSI, Static VS Dynamic?

I study one course about VLSI. in adder lecture my profesor talk about Adders. in Carry-lookahead adder first talk about static version, as follows: at next we start about dynamic version of CLA ...
1
vote
1answer
41 views

Generating a clock from timer using PWM

I am using CC2640 from TI in one of my designs. As per the datasheet, I can output a clock of maximum 32KHz to any external circuit/IC. As per my design, I Need to provide 1MHz clock to a sensor. ...
3
votes
1answer
76 views

ATSAM3X8E: Custom Arduino Due Design

I'm currentlry doing a redesign of the Arduino Due board to include some additional features I need. Browsing through the Datasheet of the ATMSAM3X8E atmel chip, I noticed that the 12Mhz Oszillator ...
1
vote
2answers
360 views

When would be occasions to use a lower clock given that high speed would always be preferable?

I am using STM32F0 MCU and STM32 CubeMX configurator. I encountered the clock configuration below When would be occasions to use a lower clock speed? Wouldn't faster always be preferable?
4
votes
1answer
84 views

Should I use an FPGA output for an MCU Clock?

We are laying out a board that was designed ages ago, the main purpose of the update is for part obsolescence. The board has several PIC uC's on it as well as an FPGA. Each of the PIC's needs a ...
1
vote
4answers
305 views

How do computers deal with RAM latency?

The clocks of CPU's have gotten faster than RAM. So computers have to wait a particular number of clock cycles between sending an address and receiving data. But how does a computer know how many ...
2
votes
1answer
19 views

Updating of a memory cell / synchronization with a clock

I'm wondering how computers actually work on a gate-level. I can see how a storage mechanism could be built from logic gates (e.g. SR NOR latch). What I'm wondering: how do values in memory cells get ...
0
votes
2answers
41 views

Source synchronous vs Common clock methodology in Physical design

I understand common clock and source synchronous clock. From this link http://referencedesigner.com/books/si/common-vs-source-sync.php. What i do not understand 1) How is maximum frequency attained ...
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vote
3answers
60 views

Creating a +5V/-4V Clock with a PIC Micro

I'm working on a project to drive a CCD array which needs a particular signal with a high of +5V and a low of -4V, changing fairly rapidly. I'm using a PIC18F4620, which as far as I'm aware, looking ...
0
votes
0answers
70 views

Is there a way to fine tune the frequency of a crystal oscillator?

I have a cheap alarm clock at home. I notified that it got about 10 min of delay every two weeks (I have to re-setup time again and again). I tear it down and found out it is driven by a crystal and ...
0
votes
1answer
44 views

Getting Raspberry Pi or Arduino to control three clock hands separately

I want to make an analog subway countdown clock. The idea is to have an ordinary clock with three hands. These hands will point to the number of minutes before the next, second next, and third next ...
0
votes
1answer
35 views

AM437x/AM335x Audio clock generation

For some ADCs and DACs I'm using I need a 24.576MHz clock (96kHz * 256). Obviously I can use a low jitter audio clock generator. However, I have a AM335x processor available that claims to have a low ...
7
votes
5answers
2k views

How do I drive 14.3Mhz clock input from 10MHz?

I intend to use an IC which requires 14.3MHz clock input, but want to drive it from a stable 10MHz source - derived from GPS. How do I turn the 10MHz clock into the 14.3MHz that the IC requires?
3
votes
2answers
152 views

Choosing crystal, strangely narrow requirements in MCU datasheet?

I am making a prototype using the Atmel ATSAM4S2B microcontroller, but I am having trouble choosing a crystal. I need a 12MHz crystal to use the integrated USB module. The problem is, in the ...
0
votes
1answer
55 views

How does a clock cycle delay skip a computer instruction?

This is from the Wikipedia entry on Pirate decryption The signals moving between the smartcard and the receiver can be easily intercepted and analyzed. They can be vulnerable to a "glitch" by ...
0
votes
1answer
82 views

How to Sycnhronize STM32F4 Clock with PC Clock

I'm using 3 STM32F401RE to synchronize their clocks. My desired accuracy is of 1ms and even lesser like 0.1ms. This device is connected to PC via USB port. Question 1 : So I would like to know if I ...
0
votes
1answer
86 views

Precision timing using arduino and external clock

I'm working on a very time limited project (8 weeks). Basically I need to perform measurements and save to memory. 2 identical boxes, 4 hours and no wireless or wired connection. Each box is ...
0
votes
1answer
38 views

Automatic and manual clock managing. Errors with ring counter but not with 4-bit counter

I'm building an 8 bit computer and I've just developed the clock. I used a NE555 (datasheet) with some other integrated (74 series) to manage it. The operator could stop signal from 555 (with a ...
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votes
1answer
78 views

Arduino based clock with 4 pieces 4" 7 Segment LED Displays

I was going through multiple tutorials on how to create an Arduino clock with 7 segment displays. I planned to build one and purchased 4 large (4 inches) 7 segment 1 digit displays. The displays run ...
3
votes
1answer
82 views

Dividing a clock in Verilog - is it OK?

Dividing a clock down in Verilog is a basic exercise, and there are loads of answers online about how to do it. What I want to know is whether it is OK to use a clock that has been divided down using ...
0
votes
1answer
60 views

555 timer digital clock

How would you go about connecting a 555 timer to a circuit with a 16x2 LCD display, which is already connected, to create a digital clock that counts the time? Do you have a sample of how this code ...
0
votes
1answer
147 views

DDRx Memory: Memory Clock vs I/O Bus Clock?

When referring to DDR/DDR2/DDR3/DDR4 memories, I am not able to understand the difference between memory clock and I/O clock. As per: https://en.wikipedia.org/wiki/Double_data_rate DDR-200 - Memory ...
1
vote
1answer
33 views

Confusion with PIC32MX1XX/2xx datasheet information (clock source for USB)

Maybe there are some experienced "wolves", who could help out to clear out confusion about internal/external clock sources. Particularly, I got lost while reading PIC32 family reference manual, "...
0
votes
1answer
82 views

maximum clock frequency for a sequential circuit

This is the all question. I thought that because Tcq>Th we will only count Tcq. If we need to know the minimum clock period, we should calculate the duration from the beginning to the output of ...
0
votes
1answer
60 views

Full-wave rectification for clock signal from wall power

I have built this power supply and clock signal extractor exactly as shown: http://electronics.howstuffworks.com/gadgets/clocks-watches/digital-clock4.htm I have double-checked this and the rest of ...
2
votes
1answer
65 views

Making a positive edge clock pulse with a button?

Is it possible to have an input, say a button, that does one positive edge clock pulse? So I want to press this button once and it does a 0->1->0. I can't think of anyway to do it because it changes ...
0
votes
1answer
115 views

STM32F4 clock behaves very strangely

I can not find a solution for why STM32F427ZIT6 clock changes during operation. I am using external 8 Mhz crystal. Should I rather look for a error in software or hardware? I have a little code, ...
0
votes
2answers
161 views

STM32F4 clock 60Mhz

I want to set my STM32F446 controller his clockfrequency to 60MHz. I thought I could do it, but without results. I am using an STM32F446 -nucleo board. I used STM32CubeMX to generate my code. After ...
0
votes
1answer
56 views

Digital Clock - set time x hours ahead?

I have a digital clock made from an electronic kit - it has 3 buttons (1 to set the time, 1 to set alarm, 1 to cancel the alarm). I want to be able to set it so every time it is connected to power ...
1
vote
1answer
138 views

Need Help In Creating and Debugging a 8Mhz CLK Circuit

I want to create a CLK generator circuit that will work at 8Mhz. I'm following this design (from http://www.electronics-tutorials.ws/oscillator/crystal.html): My crystal is 8Mhz HC49/US, with 20pF ...
3
votes
1answer
75 views

Why is my VHDL clock signal so far off from what I thought it would be?

I'm new to FPGA and VHDL. The following code was supposed to be 5MHz but I'm getting 4.167MHz on my scope. The FPGA board I ...
2
votes
1answer
44 views

In which physical unit is 'clock drift' measured?

I would like to model a clock signal with an drift parameter in my digital simulation. The current implementation handles: frequency / period phase -360.0 .. 360.0 degree duty cycle 0.0 .. 1.0 ...
-1
votes
1answer
113 views

Clock and data vs rx and tx communication

I'm working on a project in which I have to make two pic10f200 microcontrollers communicate via serial communication lines. I know that with Arduino you interconnect the two board's rx and tx lines, ...
0
votes
0answers
55 views

Cycles lost on clock domain crossing

I have a MAC (VHDL) connected to the PHY through RGMII (so the clock for this communication is 125 MHz). The MAC outputs every byte at a rate of 200 MHz, so there is some clock domain crossing here. ...
0
votes
1answer
76 views

frequency divider by 42 with 50% duty cycle

I want to design a clock divider by 42 from flip flops. Is there a way to do that while still gets 50% duty cycle?