A digital signal that goes high and low at a specific frequency.

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47 views

Counting PIC18F46K20 internal clock edges using MPLAB C18?

I am trying to create a countdown timer using the PIC18F46K20 and display the time on the OLED. I have set up TIMER0 to create a delay of 1 second ( T0CON = 0b00000001 ) so the variabe intCLKsecs ...
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0answers
27 views

Counting PIC18F46K20 internal clock edges using MPLAB IDE C18? [on hold]

I am trying to create a countdown timer using the PIC18F46K20 and display the time on the OLED. I have set up TIMER0 to create a delay of 1 second ( T0CON = 0b00000001 ) so the variabe intCLKsecs ...
0
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1answer
19 views

Quartus II Memory Read Clock Problem

I used LPM_RAM to store data and made read and write operations. But it seems like placing the data to wrong addresses. Here is screenshots; Wave Result; Memory Block;
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1answer
46 views

How do I build bracelet that vibrates at a set time? [closed]

I understand that there was a similar question asked about a bracelet that vibrated every n minutes, but this is different. I'd like to build a 'alarm-clock-bracelet' hybrid that has some sort of ...
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0answers
52 views

Do I need to use a programmable oscillator?

I can produce pwm signals with my mcu and I am intended to use this signal to feed another MCU's external clock input. But my output pwm signal voltage is 5V and I need peak to peak 2.5V signal and it ...
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66 views

How to use a crystal oscillator

I am trying to use a crystal oscillator as a clock signal for the PWMCLK input of a LED driver chip (TC62D723FNG) I have a FOX 1813-0245 8926 25.00000 MHz crystal oscillator I picked up at a local ...
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1answer
33 views

How to create variable clock frequency source in Cadence Virtuoso?

I am working on Delay Locked loop Project. I want to check the lock range of the dll. I am using vpulse for clock but by giving parameters clock period, clock width, rising time, falling time. It ...
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2answers
72 views

Clock synchronization between Cortex-A9 and Cortex-M3

I'm working on the synchronization between a Cortex-A9 and Cortex-M3 microcontroller. The Cortex-A9 is the master and is connected to the Cortex-M3 via SPI. How can the Cortex-A9 (master) and the ...
2
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1answer
57 views

Clock generator/synthesizer, Frequency generator/synthesizer. What is the difference?

EDIT: Question simplified: What is the difference between frequency generator and frequency synthesizer. What is the difference between clock generator and clock synthesizer.
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1answer
47 views

Using the same clock for multiple shift register

Sorry for the beginner question. I'm working on a nixie tube clock and I have a bunch of shift registers for each tube. Do I need to use a different clock for each IC or can I use the same clock for ...
3
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2answers
121 views

How to “deserialize” a digital output to 4 digital outputs

I am working on a small test project for my Arduino and as part of it, I want to display a number on a 7-segment LED system. My first setup involved just direct links to the 7-segment display and ...
4
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3answers
625 views

Multiply clock frequency by three or more times?

Frequency of a digital clock signal can be doubled by using an EXOR gate (clock at one input pin and delayed clock at another). Can we use any similar circuit which can multiply frequency by three ...
2
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1answer
36 views

Eliminating Signal Race Hazard in an IC dynamic latch/register!

I work in MAGIC Integrated Circuit software at layout-level. I got an 8bit dynamic register made of 1bit dynamic flipflops that write input on the positive edge of the signal: (Note: I used ...
2
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0answers
77 views

How do I know if I fried my Z80?

I'm working on a free-running circuit like the one here: http://www.z80.info/z80test0.htm The only differences are that I'm using a 4049 clock circuit with a 1 uf cap, and I've added an extra LED at ...
2
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1answer
80 views

Johnson Counter VHDL

I have a problem given to me that states: Design a 4-bit Johnson counter and decoding for all eight states using just four flip-flops and eight gates. Your counter needs not be ...
2
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1answer
57 views

Clock Deskewing and flip flops

I have a question in my text book that I do not quite understand. I was wondering if someone could please explain what the question means? Such as, what is a deskewed flip flop. How would one find the ...
0
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1answer
41 views

Fixing ATtiny45 Clocksource

I accidently changed my ATtiny45 clock source to 128khz . After that I can't program it . I tried avrdude in terminal mode but it doesn't work . ...
1
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1answer
64 views

Crystals as RLC circuit? How?

What gives the crystal oscillator a property of Inductor? How does energy transformation between electrical field and mechanical stress and strain makes oscillator work like a Inductor? I know how ...
1
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1answer
201 views

Driving a LED matrix wall clock display (e.g. 64x16) from a Raspberry Pi?

My goal is to create a single-colour LED matrix display to show world times for several cities - e.g.: ...
3
votes
1answer
53 views

Help to understand output levels of clock buffer

I'm dealing with clock buffer and trying to determine how output levels depends on the input. I'm using information from the datasheet. Here is the table with information: I don't understand the ...
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2answers
69 views

External Clock Input to Microchip Microcontroller NOT Gate?

I'm using a PIC24FJ256GB110 connected via SPI to a CAN Bus Controller chip MCP2515. The MCP2515 requires a crystal connected to it but has a Clock Output pin for driving a connected MCU. So I was ...
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0answers
53 views

STM32F207 timer2 output toggle

I am trying to get clock signal out of timer 2 channel 1 on my STM32F207ZGT6. I wnat to use the compare match to toggle the pin, but nothing I programm seems to get any kind of signal on that pin ...
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2answers
48 views

Difference between setting up clocks on Verilog

These two statements are used quite often, to set up clocks in test benches: initial begin clock = 1'b0; forever #5 clock = ~clock; end ...
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1answer
65 views

sequential circuit chaser light

I am trying to implement a sequential circuit in logisim that has LED chaser lights (http://www.youtube.com/watch?v=Mo8Qls0HnWo) like on this car. I have tried using D flip flops with a clock and ...
4
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1answer
107 views

Distributing a 40MHz clock to several PCBs

I need to run four PCBs with a very accurately synchronised clock. The source clock is 40MHz, but each PCB contains a 1GHz PLL, and will be timing events in the analogue domain with a final ...
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2answers
53 views

Sporadic Clock Signals from Momentary Switch

I'm having trouble using a NO momentary switch to send clock edges to a J-Kbar flip flop, specifically the TI CD74AC109E(datasheet). I have a switch between +5V and the clock pin, and also added a ...
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3answers
536 views

Clock divider VHDL

I created a clock divider with the code below. i followed steps in prof chu's book. ...
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2answers
43 views

query related to latches

I had two doubts about the working of an s-r latch. One is, when we apply a clock signal along with the s and r inputs to the gates, how do we administer the time after which the clock signal changes ...
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1answer
98 views

I2C slave not pulling down SDA data line for the full clock cycle

I am communicating with some slave devices via multiple busses, however even though they are all the same device (http://www.invensense.com/mems/gyro/mpu3050.html) and all receive the same ...
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1answer
314 views

How to make a digital clock using MSP430G2553?

I want to make a digital wall-clock as a small electronics project. Since I am very new to this stuff I want to just try to imitate some already completed projects so that I can learn from them. I ...
2
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3answers
174 views

Design practice crossing clock domains and async signals

I have been designing a few projects on different FPGA's in VHDL, and it seems my most common source of "hard to find errors" is when I forget to synchronize an async signal, or forgets to resync a ...
2
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1answer
118 views

Circuit to enable (inverted) clock glitch free

This is a follow-up question to http://electronics.stackexchange.com/a/95195/13354, in which I was asking about a specific solution to the more general problem described here. I'd like to create a ...
5
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1answer
205 views

is 555 timer good to generate 20MHz clock?

I am looking for a way to generate 10 to 20MHz TTL-compatible clock signal. I used something like microchip unit to produce clock signal before in school but I didn't use any other way to generate ...
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1answer
113 views

Cortex M3 clock configuration

I've just started working with the Stellaris LM3S9B92 (Cortex M3). I have some problems understanding the SysCtlClockSet() function. On the Driverlib page 350 they ...
3
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1answer
194 views

How does the DDR clock compensation capacitor improve signal quality?

I saw in some DDR3 designs that there is a capacitor between differential clock lines, for example the image below: In the document this image comes from it says: On the DDR3 SDRAM DIMM, there ...
2
votes
1answer
108 views

Using UART clock 3.6864 Mhz for a microcontroller

I want to use a 3.6864 MHz external oscillator to clock my ATMEGA328p to ensure 'error free' serial communication. When I looked at this page, I see that 3.68464MHz is also represented as 2*1.8432 ...
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1answer
105 views

In digital electronics, is the essence of “on/off” states driven solely by chemically-doped silicon? [closed]

I believe that in digital electronics, such as those measured in binary, we use semiconductor-doped amplifiers to switch electrical signals around. In the simplest sense we could split one analog ...
18
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6answers
2k views

Why are clocks used in computers?

As I know, a clock controls all of the logic operations, but it also limits the speed of a computer because the gates have to wait for the clock to change from low to high or high to low depending on ...
4
votes
3answers
128 views

Clocked edge-triggered timing (contamination delay)

I'm reading a book about computer architecture, and it says that, in clocked edge-triggered devices, the contamination delay is usually nonzero, and that the contamination delay for registers is ...
2
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0answers
30 views

Intermittent control signal injection clock sync

I have a big challenge in my design to overcome: I need clock frequency accuracy of <0.2ppm with incredibly low power consumption. What we are doing currently is, using a 3G transceiver' baseband ...
2
votes
2answers
528 views

How to route a LVDS clock from FPGA input to output?

Using VHDL, How is it possible to receive a pair of LVDS signals (say external clock) on the FPGA and route them to another pairs of pins to go out, without any modification? I have tried IBUFDS and ...
1
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1answer
165 views

pci express bifurcation - clock fanout buffer needed to split reference clock?

I am designing for a motherboard with a single PCIe x16 slot which can be bifurcated into 2 logical x8 slots with jumper settings. I am designing a board to handle the physical splitting of the port. ...
3
votes
1answer
120 views

Sanity check: Using the DS3231 as a clock source for uC

The DS3231 is an RTC chip with an onboard temperature compensated oscillator and 32kHz output. I want to use this chip in a small clock project I'm designing because I've got a couple lying around. ...
4
votes
1answer
163 views

Properties of a WWVB Receiver

In this article the author dissects a radio-controlled clock that syncs with the NIST transmitter, WWVB, in Colorado. The radio receiver seems to be a single integrated unit: Of special note is ...
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1answer
84 views

PCIE reference clock

I recently completed a PCI-E Gen 1.0 line card design. The line card consisted of 4 Spartan 6 FPGAs sharing one PCIE reference clock. Early on in the design there was a decision to solely use the PCIE ...
2
votes
3answers
272 views

Counter: pulse every 8 clocks

I have a square signal (fixed but can be between 12MHz and up to 48MHz) and I would like to create every 8 clocks a pulse as brief as possible, no more than 1/4 of the period. First, a couple of ...
0
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1answer
54 views

Crystal and Oscillator [duplicate]

I know that crystal oscillator is a type of oscillator. But why in colloquial terms crystal is different from oscillator and how they are physically different?
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3answers
204 views

How to perform a synchronous output on the Arduino?

I have a device I'm trying to control with the Arduino. It works like this. Arduino sets and holds 'ready line' to 5V high. Device sees ready line high and sends 16 clock pulses for two bytes of ...
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2answers
189 views

Confusion over clocks in FPGAs / Verilog

I just purchased an FPGA and I am learning Verilog but I have run into a few confusions, most of them regarding the clock. My first question is, how does sequential logic work? Are the assignments ...
0
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2answers
137 views

Does Intel pentium 4th generation was made for 10GHz [closed]

Somewhere during browsing on Internet I have seen that Intel Pentium 4th generation was made for a high operating clock frequency of around 10GHz, but the researchers can operate it only for a ...