I have designed a FPGA based DDS that creates digital signals between 0-70MHz. Now I want to convert my digital data into analog. As the base frequency is 200MHz, I need a high performance parallel ...
If I want to have a resolution of X * Y pixels, updating in frequency f. How do I calculate the pixel clock speed? Example: 1280 x 1024 @ 85Hz usually have a pixel clock of 157.5 MHz, but how do I ...