Tagged Questions

0
votes
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Clocking scheme for LAN8720A - Cortex M4

This is regarding a design choice involving LAN8720, specific to clocking schemes. We are interfacing an ARM cortex M4 (with inbuilt MAC) to the 8720 PHY via RMII in the REFCLKO configuration. In the ...
3
votes
2answers
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Alternating patterns in 8b/10b encoding

I'm trying to evaluate the quality of an 8b/10b encoded data stream (Gigabit Ethernet, 1.25 gigabits/sec). Without doing clock recovery from the data stream, I want to measure jitter (et al) with a ...