CMOS stands for Complementary MOS, most digital logic is made in CMOS.

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Do logic families use different type of transistors?

Do the logic families such as TTL and CMOS represent only different logical structure? Or do they also use different type of transistors? Latest microprocessor chips with millions of components use ...
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23 views

Parasitic delay of a matched (to reference inverter) CMOS gate [on hold]

What's the parasitic delay the matched CMOS gate. The matched values are: Pull up: C:2 A:4 B:4 Pull Down: C:2 A:1 B:1
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1answer
61 views

Precise differences between DRAM and CMOS processes

There are a couple of questions that mention the difference between standard CMOS processes and DRAM manufacture: Why do microcontrollers have so little RAM? How do they integrate logic into a DRAM ...
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2answers
98 views

An Explanation of CMOS Logic

While trying to understand CMOS Logic on Wikipedia for class, I came upon this paragraph which I can't quite wrap my head around on the duality of CMOS: "An important characteristic of a CMOS ...
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1answer
67 views

Switch Vcc to Ground with a control bit

I have a device that is 1 ohm and it consumes 3Amp. I want to run my device in both ways and I have only one voltage supply. I want to switch ground to Vcc and vice versa with a control bit from mcu. ...
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1answer
49 views

CMOS vs LVDS oscillator

I am trying to select a 160MHz clock oscillator for my FPGA. The least expensive I found was either LVDS or LVPECL type for this frequency. I used a CMOS type before, so the output of the oscillator ...
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1answer
34 views

Online resource for lithography/micro fabrication [closed]

I am looking for good compiled resources on microfabrication (photolithography, ion etch, etc) for making integrated circuits. Some background: I do some work in a cleanroom user facility making ...
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0answers
35 views

Simulation to find worst-case delay path

Assume there is a combinational logic function implemented by a CMOS logic inside (1 Pull Up network and 1 Pull Down network). From the intuition of RC Tree elmore delay analysis, we know that input ...
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2answers
56 views

Question about CMOS Inverter Oscillator

Using CMOS inverter with crystal and cpacitors, we can make a oscillator. And i find many docs mention the method 'negative resistance'. But, they are not all the same. The method from TI's doc: Use ...
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3answers
118 views

How can PMOS eliminate body effect but NMOS doesn't?

I have a question on the body effect of MOS transistor. In particular, how does the body effect in PMOS be eliminated (by connecting bulk to source together) while this similar technique doesn't do ...
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2answers
62 views

NMOS transistor: how does its structure relate to two interconnecting diode?

There is a popular idea that structure of NMOS transistor could be viewed as the inter-connecting diode across their PN junction. Therefore, when operating NMOS, you always want to keep the Source and ...
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2answers
38 views

CMOS gate logic switching time based on input vectors

My question is regarding CMOS logic gates switching time based on input. Say I have a NAND gate and my input vectors are: 00 | 1 01 | 1 11 | 0 10 | 1 So, the ...
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5answers
194 views

CMOS inverter with feedback

In some circuits such as crystal oscillators, there is a CMOS inverter with a feedback resistor, they all simply say the resistor bias the 'amplifier' and force it to operate in the linear region, ...
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0answers
43 views

Preference of MOS resistor as load in MOS inverter [closed]

Whys is a MOS resistor preferred over diffused resistor as load in design of a MOS inverter?
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2answers
48 views

NMOS: what exactly forms the inversion layer

I have a a question on forming of the inversion layer in NMOS. More specifically, please refer to the following figures The negative ions (in-mobile) are due to the the accumulation of the positive ...
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3answers
101 views

NMOS: why VGS instead of VG?

I am having lots of trouble trying to understand how the mosfet is triggered. The text I read assumes the source of the NMOS connect to ground, while a positive voltage is applied at the gate. ...
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0answers
30 views

Derivation of depletion layer in depletion mode in MOS Structure

First off, please understand my background. I am doing a course in Digital Integrated Circuits and following the book CMOS Digital Integrated Circuits and Design by Kang (3rd Edition). I barely have ...
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0answers
28 views

NOT consistent Euler Paths in logic diagram. What now?

i'm working with non-series-parallel arrangements, something like this: as you can see, the euler paths in pull-up and pull-down are differents. for example, in pull-up we have "abcde" and in ...
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2answers
83 views

More advice desired on my Model Railroad Building light controller circuit

Building is built in O Scale (1/48) and has 40 rooms that are lighted independently (masked out from each other with walls) Rooms are lighted with White LEDs. The rooms will light one at a time (but ...
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1answer
67 views

Floating a digital output pin of an IC

I'm using a FXLS8471Q accelerometer for a project using the SPI interface. The chip uses the same pins for SPI and I2C. To detect which interface the user desires, the chip samples the SA0 pin on ...
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2answers
140 views

Circuit for model railroad building lighting control

The building has 10 separate rooms. Want the circuit to turn on LEDS to light each room sequentially. Another words you turn the circuit on, a 555 timer pulses and turns on room one. About 5 seconds ...
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1answer
55 views

LTSpice Level 2 Simulation CMOS follower

I'm trying to make a level 2 simulation of a voltage buffer made by a CMOS circuit: For this, I have been told to use level 2 CNM25 technology Spice models for the transistors, and I have been ...
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3answers
141 views

Circuit to switch about 5W of 12V using CMOS logic inputs using N-channel MOSFET?

I want to switch some 12V landscape light LEDs, totaling about 5 watts, using MOSFETs. I thought I had some logic level N-Channel MOSFETs lying around, but apparently not. What I have is several ...
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1answer
85 views

Is a DVD sensor a photodiode or an array of them?

Is a DVD sensor just a photodiode or an array of them? I need to know if it is a CMOS with an array of them or just a single sensor.
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66 views

Voltage transfer characteristics of a C-mos inverter

How to determine the voltage transfer characteristics of a c-mos inverter during the region when both the p-mos and the n-mos transistors are in the saturation region.I know that both the transistors ...
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30 views

Using n-mos and p-mos transistors as pass transistors! [duplicate]

The n-mos passes a good '0' and the p-mos passes a good '1'.What is the logic behind this?Can anyone suggest a proper book to study Vlsi design?
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126 views

Should I use CMOS vs. TTL?

Now, I know that this question has been asked so many times that it seems like I'm trolling, but I must point out that I couldn't find the right answer to this question anywhere. So yeah, CMOS and ...
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1answer
37 views

Capacitive load at the output for analysis of CMOS cells

This question is very rudimentary one. Please point me to the link if this question has been already asked. In general, when working with simulations and and analyzing the standard cells designed ...
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0answers
140 views

How to bias a MOSFET folded cascode transistor using a cascode current mirror?

In the given picture how the folded cascode present at the output is biased. The method used by the author is direct voltage source biasing, but I wish to use a cascode current mirror but facing a ...
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2answers
82 views

Dynamic Logic - Transistor Sizing

If we have a circuit in dynamic logic: What should the size of the charge transistors (Qe and Qp) be? I know that increasing the size improves the speed but also increases the dissipation, and that ...
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1answer
46 views

What is the appropriate name for camera modules/sensors? And what kind of supporting circuirty is needed?

I have seen CMOS Imaging Sensors (OmniVision, Aptina, ST, etc) as well as Camera modules (like the ones in smartphones; e-con, OmniVision, etc), and I know there are the finished product cameras ...
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3answers
79 views

Synchronous 4-Bit Up/Down Counters preset

I have a synchronous 4-bit up/down counter, and in the data sheet it stands that there are 4 pins where I can enter a 4 bit preset number, but it doesn't say what this number represents. I believe ...
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0answers
84 views

Arduino for fast mechanical changing lens to synchronize microscope (CMOS) reading

This is a small part of my possible research internship at an institute which works with Biophotonics, now despite being an electrical engineer, I'm still unable to figure out if this is possible. So, ...
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1answer
311 views

Beta Multiplier Reference: What is going on with the current output?

I have been working on a beta multiplier reference circuit using a 0.35um CMOS process. The circuit was previously designed and tested for a 0.7um process, but otherwise there have been no changes to ...
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2answers
67 views

CD4053 vs IM06TS

I am in the process of finalizing a switch matrix based testing scheme. I am in need of SPDT type switching elements. Two options that I came across: CMOS Switching - CD4053 Hermitically Sealed ...
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2answers
139 views

NAND2 tpHL delay worst case

We have a NAND2 gate and we want to find which input leads to the worst case tpHL delay. I can understand that for input 00 and 11 is the best case to charge and discharge. I also understand that for ...
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1answer
189 views

HEF40106BP oscillator output frequency [closed]

I have a NuTone four note Door Chime, Mod# LA500K. I want to slow the chime cadence. There are two ICs: CD4017BE & HEF 40106BP. Can someone tell me if this is possible and how? (RC circuit?) ...
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2answers
153 views

delay on cmos inverter while increasing W of nMOS and pMOS

We have one CMOS inverter and a fixed capacitance as load , for example 0.1pF . As an experiment we increase W of nMOS and pMOS and each time we increase W, we find the delay of the inverter (using ...
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2answers
122 views

Equivalent width of CMOS gate?

When setting up the gate that is defined as OUTPUT=(AB+C)' Why is the pull up network equivalent width equal to 4? I know the pull down network is counted in series, so you just add the resistor in ...
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1answer
158 views

Difference between rising edge falling edge D flip flop (asynchronous reset)?

I am answering a question about a D Flip-Flop with Asynchronous Reset with the reset output '0', that is set to be rising edge triggered. What i don't know is the difference between a rising edge ...
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1answer
108 views

Short Channel effect

I have searched for short channel effect in google. There are plenty of articles on that topics, but I can't somehow understand them all. Can you please briefly explain in plain words what are they? ...
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1answer
112 views

How do you calculate the random input referred offset of a basic two-stage op-amp?

I have all the mismatch parameters necessary, just wondering where to start. Most documentations I see just teach you how to measure, not calculate.
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1answer
100 views

+24V supply versus +/- 12V supply

In CMOS mix-signal circuitry, would it make a difference if I set Vdd to 24V and Vss to 0, instead of having +/- 12V supply rails? I know voltage is just a reference, but do the absolute numbers ...
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2answers
145 views

Off Resistance of Analog Switch 4066 pretty low?

I am trying to use an analog switch to switch signals between my end nodes. Before I tried in actual circuit, I wanted to try it in a test circuit. As, 4066 can act as a switch for both Analog and ...
2
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1answer
80 views

Safe way to wire CMOS ICs together

I have a question about the safety (to the ICs) of wiring the output of one IC directly to the input of another IC. simulate this circuit – Schematic created using CircuitLab For ...
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0answers
42 views

How to calc charge pump mismatch current

I'm designing charge pump for a PLL in a GPS receiver. I got the output but, I need to know how to measure current mismatch? In research papers , graph is plotted between output voltage versus output ...
2
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0answers
59 views

OPAMP common mode half circuit with its gain

I have a really complex circuit as shown: M4,M7,M14,M15 all pmos the others->nmos I am asked to draw common/differential mode half circuit. What I don't know: How to deal with M14, M15? Which ...
2
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1answer
52 views

making sense of HCT ACT cmos “addional supply current”

I'm trying to make a low-current level shifter from low voltage (~2V) CMOS up to 5V CMOS. I had the idea to use TTL-compatible CMOS gates in the HCT or ACT families. But this line in the 74HCT04 ...
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1answer
109 views

High-Sensitivity, Low-Latency Imaging Sensor

This might be a bit of a long shot for this venue, but: I'm looking into sensors for a scientific imaging application where the key is excellent sensitivity (quantum efficiency and noise performance) ...
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2answers
108 views

Can Arduino power and hookup to logic chips?

I am making a device that has two external interactions i.e. a button and a infrared sensor. My only problem is that I am using a logic chip for this because it would save me time coding on the ...