Computer architecture refers to both the design of a computer's external interfaces (instruction sets) and a computer's internal implementation (microarchitecture). The goal of these design decisions is to optimize speed, power efficiency, size, or cost while satisfying constraints on the rest.
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Are blocks physically contiguous like frames are? [closed]
Computing makes the difference between physical and logical / virtual addressing so that physical frames in the computer memory are represented by logical and virtual so-called pages when the computer ...
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118 views
Instruction Register? Whats it's purpose/how is it connected? (And what happens after)
So im learning the SAP 1 Computer Architecture. Most things I get pretty well, but from what I understand: (Lets pretend it's an 8bit and address is 4 bits and opcode is 4bit)
...
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2answers
60 views
Classic RISC pipeline question
Consider the following instruction sequence:
Add R3, R4, R5 (R4+R5->R3)
Or R2, R4, R5 (R4 OR R5->R2)
Add R1, R2, R3 (R2+R3->R1)
Assuming no data ...
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1answer
39 views
What's the difference between delayed branch and branch prediction?
I'm studying how delayed branch works and I'm trying to distinguish delayed branch from branch prediction. What is the difference? Is delayed branch a means to facilitate a control hazard?
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1answer
24 views
How to calculate the address fields for a cache?
I've a homework question about 32-bit cache memories:
For a cache memory that has size 16kB (16384 byte) and blocksize 2
words, state the names and the sizes of each field of the address that
...
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2answers
60 views
What is the meaning of “Register.Rd”?
Reading Hennesy's book "Computer Organization and Design" it is mentioned "Register.Rd" and "Register.Rs" but what does it mean? The .Rd, .Rt and .Rs parts I can't understand, on page 365:
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1answer
70 views
How is sign extension used in practice?
In wikipedia it says what sign extension is but it doesn't say what it's used for or when it is used. I read Hennesy's book "Computer Organization and Design" and it has a sign-extension mechanism ...
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1answer
88 views
What does RWM mean?
I'm studying computer hardware and the acronym "RWM" appears, so I wonder what it means? It has to do with LOADs and STOREs of instructions.
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1answer
69 views
How does the Store Word(SW) and Load Word(LW) instructions work, MIPS
The SW and LW instructions are defined as:
...
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1answer
84 views
Seeing how Instructions get Translated (Computer Architecture) [closed]
Little bit of a confusing question, also an x-post (Since it may be more suited here than SO). But anyways Im really looking for learning some low level programming. Thing is, Dev boards like ...
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2answers
56 views
What is the reason of RAM modules conflicts in terms of computer architecture?
What is the reason of such conflicts?
I read a book "Computer architecture" by Andrew Tanenbaum, but didn't understand the reasons may cause conflicts with memory with different timings, frequencies.
3
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1answer
52 views
How to best understand cache associativity?
AFAIK this definition is the most clear and physical:
Associativity number = Number of comparators.
Is it correct? Could you make a more precise / better definition?
The wikipedia illustration is ...
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1answer
89 views
Writing a method using MIPS code
I am trying to understand how convert C code to MIPS code and I have having trouble understanding why the stack pointer( $sp ) needs to be manipulated before and after the procedural code.Isn't the ...
3
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1answer
236 views
How can a CPU dynamically change its clock frequency?
My Intel CPU changes clock speed depending on the usage, but how does it decide what clock speed to run at? Is the clock speed determined by the OS software using an algorithm, or is it hardware ...
5
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3answers
115 views
What does it mean for a CPU to support a stack?
How can a CPU not support a stack? Doesn't any architecture that uses subroutines (I'm pretty sure that's all architectures) have to push the return address onto the stack so it can return to where it ...
22
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6answers
1k views
Why is open hardware so rare? [closed]
I'm trying to understand why open hardware is so much harder to come by than software. I've tried looking around online and I couldn't find as satisfactory explanation.
I understand that hardware is ...
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1answer
76 views
Processor - L1 Data cache interface
Sorry if the following looks like a very specialized (or programming) question, but I'm hoping there are people on this forum who have done VHDL/Verilog modeling, and might be able to answer:
I'm ...
11
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3answers
435 views
How does the Harvard architecture help?
I was reading about arduino and the AVR architecture and got stuck at the point that how does pipeline stall or bubbling is solved by Harvard architecture introduction in the AVR.I mean what Harvard ...
2
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1answer
125 views
Electrical Engineering vs Computer Engineering? [closed]
I am trying to decide whether to major in EE or CE. To my knowledge, computer engineering has the same core focus as electrical engineering but with an emphasis on digital logic and microprocessors. ...
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1answer
281 views
Using CCM (Core Coupled Memory) in STM32F4xx
STM32F4xx microcontrollers have 128KB of SRAM + 64KB of CCM SRAM. CMM SRAM is hardwired to data bus so it is impossible to use it with DMA.
What is the reason to add additional SRAM as CCM?
Does it ...
2
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1answer
182 views
How to calculate index and tag fields lengths for a cpu cache?
I study computer engeering notes for a cache memory and I try to understand what determines the length of the index and the tag fields. The first examples is for 64 bits and the second example is for ...
3
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1answer
244 views
What is CLK in UART/USART used for?
I'm studying computer architecture at my university and I've been recently asked a question: what is CLK used for in UART/USART? The first obvious thing is that it is used for dividing frequency when ...
2
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2answers
142 views
Verilog asynchronous reads of regs - and design question
I'm trying to understand what the following bit of behavioral code, what kind of hardware it turns into:
...
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2answers
116 views
What determines the number of bits for the address field in a cache memory?
I understand a cache memory is constructed for a basic block like this
Valid bit | Address bits | Data/Instruction
But what determines the length of the address bits? I understand that for a 32-bit ...
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1answer
92 views
Running the linux kernel and ubuntu on a custom processor [closed]
This is hardly a theoretical question as many have done this, albeit there's very little information on the underlying processes.
I'm developing a custom MIPS-based processor on which I would like ...
4
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1answer
158 views
Processor design: turning blocks on/off dynamically to save power?
I was wondering if this is possible and if it is done in current designs. Seemed like an interesting enough idea to me. Here's a little diagram I made to help try and explain:
So let's say I'm ...
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3answers
112 views
Cache write/read times?
I would like to devise certain rules of thumb to help solve certain computer design/architecture challenges. Hence, in memory, which operations typically take longer to execute: loads or stores?? I ...
2
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1answer
127 views
clarification about amdahl's law
A system is designed as a cascade of of 4 subsystems, each contributing the same amount of time to the average service time of the system. If we wish to increase the speed of the system by a factor ...
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2answers
549 views
Are 32-bit ALUs really just 32 1-bit ALUs in parallell?
I'm reading the high esteemed text Computer Organization where this picture is found that is supposed to represent a 32-bit ALU:
Is this technology really how it's done, just a lot of 1-bit ALUs, so ...
2
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1answer
441 views
Calculating range of two's complement
This is a computer architecture question given in our college syllabus and i was finding difficulty in solving it.
Calculate the range of a 16-bit 2's complement number system for representing both ...
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3answers
146 views
Do computers delete memory contents? [closed]
So, if the program is finished, and jobs done, do computers "physically" reset memory contents? If they don't, what are the reasons for not resetting memory contents?
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4answers
551 views
Why do computers only use 0 and 1?
Why do computers only use 0 and 1? Won't the addition of other numbers such as 2 or 3 speed up computers? Also, 2 and 3 can be used to shorten the bit-length of integers (2 and 3 can be used to end an ...
2
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2answers
203 views
Is primary memory buffering the only way to access I/O devices and secondary storage?
I'm not sure if this is the right stack exchange site to ask this question so sorry if it's not. If anyone can cite a good book which explains computer architecture in general (not for a specific ...
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3answers
216 views
Where is the software / hardware boundary in modern computer systems?
Computers are pogrammed in (and controlled by) software. That software is often run by other software (e.g. Java compiled into bytecode, run by a Java VM coded in machine instructions), which is in ...
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162 views
clock signals in computers and machines [closed]
Why do computers have clock signals and clock rate, while ordinary machines do not have them?
And why is clock so fundamental in CPU and mainboard?
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2answers
162 views
A Strange Computer : Cache based computer [closed]
In the Operating System class I heard from Professor that in some institute, researchers are working on cache based computer ( means the computer that don't have RAM and have a big cache ( probably 1 ...
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3answers
258 views
Memory (RAM) of computers after shut down
After computer shuts down, is it possible to retrieve data in RAM? I heard that police was able to do that... so I felt that was somehow weird..
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2answers
321 views
Understanding basic computer hardware diagram of address decoding circuit
Hi I'm a computer science student doing a computer hardware course and am having trouble understanding this circuit which is supposed to show how control signals at the memory can be generated using ...
2
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1answer
167 views
Resources for IBM PC compatible motherboard / Intel 80486 development
I'm trying to find some resources on designing motherboards, but there doesn't seem to be much out there. I'm also looking for information about interfacing with an Intel 80486. I mostly understand ...
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2answers
440 views
8 bit octal full adder help
I have this project listen below and im not sure where to start maybe someone can give me a few pointers or perhaps point me in the right direction of starting this?
Thanks!!
Input: A, B = octal ...
3
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1answer
219 views
Cache. MESI protocol for multilevel cache in Intel processors
Now I'm trying to simulate the performance of Intel CORE 2 Duo processor (but I'll be very pleased with information about any other multi-core Intel processor) and it's work with the computer memory. ...
2
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1answer
155 views
Making a toy DSP processor
When I was trying to learn computer architecture the thing that helped me the most was making a toy 4-bit processor (through gate level design of every single thing). Now I want to learn about DSP ...
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2answers
213 views
early accumulator based machines
Wikipedia says that many of the early machines were accumulator-based machines.
My guess is that in those machines the accumulator did not play the role of a speed-up register as do registers in today ...
2
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2answers
299 views
How to solve Bus Contention problem in my case?
The following image describes the problem:
Processor 1 has no RS232 channel, but has an SPI one, so we used a UART driver and a level translator ICs.
The two processors are on separate boards, and ...
2
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1answer
187 views
Given a shift register- Create a circuit to check whether 4 first bits are equal to the last 4
I hope this is the place to ask such a question.
Given a shift register- within 8 clock pulses 8 bits will enter this register, I need to make a circuit with this register, and other 3 flip-flops ...
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2answers
114 views
D flip flop data extraction
How do you get the data out of a d flip flop? On wikipedia it says that if the clock is non-rising then it ouputs Q. Isn't the clock always non-rising if it's not changing the data? If it is, then ...
2
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3answers
213 views
Sequential Circuits
I'm learning about sequential circuits, and it's driving me crazy. How can you use an output as input, what was it's value at time 0? It can't go on forever...
11
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6answers
650 views
What are the advantages of using FPGAs over TTL in intro computer architecture?
I teach the one and only computer architecture course at a liberal arts college. The course is required for the computer science major and minor. We do not have computer engineering, electrical ...
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1answer
178 views
Different screw and their material purpose for computers [closed]
At our computer store, I had a luck to get to screw sorting (uh, how I like that) and got to question: is there any guide/rules, where should each of them be used. There are different color/material, ...
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3answers
309 views
address field and words of memory
"Consider as an example a typical computer of that era which might have had a 16 bit address field in its instructions and 4096 words of memory.A program on this computer could address 65536 words of ...
