Computer architecture refers to both the design of a computer's external interfaces (instruction sets) and a computer's internal implementation (microarchitecture). The goal of these design decisions is to optimize speed, power efficiency, size, or cost while satisfying constraints on the rest.

learn more… | top users | synonyms

0
votes
1answer
30 views

What Else do I Need to Make a Speaker Work in These Conditions? [on hold]

Recently, I was faced with a slight challenge. My computer stopped wanting to power on, and I needed it to work fast. As a computer technician (in-home), I had all of the tools necessary to fix the ...
-3
votes
0answers
35 views

Differences between architectures in microcontrollers [closed]

Could anyone explain me what are major differences and features of the Harvard architecture microcontroller devices that are different to the Von Neumann architecture usually found in microprocessors? ...
0
votes
0answers
10 views

resolving data hazards in pipelined datapath using forwarding and stall

I have a question about resolving data hazards in pieplined datapaths using stalls. In some slides and resources I read, when computing execution time they have the IF or ID stage directly under a ...
55
votes
12answers
16k views

How can we be sure that computers will never accidentally switch a 0 by a 1?

I've read a bit about the construction of a digital computer in Shocken/Nisan's: The Elements of Computing Systems. But this book says nothing about certain electrical aspects in computers, for ...
1
vote
1answer
38 views

Is depth and number of stages the same measure for a CPU pipeline?

Is it true that the depth of a CPU pipeline and the number of stages of a computer pipeline are different measures? There is not much info about it if I google or look in my books. I think that depth ...
22
votes
5answers
7k views

Why are relatively simpler devices such as microcontrollers so much slower than CPUs?

Given the same number of pipeline stages and the same manufacturing node (say, 65 nm) and the same voltage, simple devices should run faster than more complicated ones. Also, merging multiple pipeline ...
24
votes
4answers
4k views

What exactly does ARM sell to vendors?

Assumptions: Computer architecture: Describes how the different modules of a processor interact with each other. A computer architecture is defined using vhdl ...
0
votes
1answer
46 views

What are the (mathematical) restrictions of a TMS320C6713 DSP?

I have a function that computes the sum of even numbers in a Fibonacci sequence less than a boundary. Should I be worried about this calculation? Can the TMS320C6713 handle it? When I run the ...
4
votes
1answer
52 views

Help with multiple receiver channels and single storage architecture

I want to build a datalogger that has multiple receiver channels that run on serial communication protocol RS232 and then collect the information from the channels in a single storage that would be ...
1
vote
3answers
133 views

Is it possible to replicate the ENIAC using logic gates

Can one rebuild a small scaled model of the original ENIAC computer using only logic gates?
1
vote
3answers
150 views

Can you make a CPU out of logic gates

If i solder together enough binary adders, binary subtractors is it possible for it to work like a modern (very very slow) CPU (Such as one found in a graphics calculator).
-2
votes
2answers
53 views

Building a XOR gate on 3 inputs using only 5 AND/OR/NOT gates

I would like to implement a XOR gate which takes a 3-bit input (in other words, the modulo-2 sum of the input bits) using only 5 ...
19
votes
7answers
5k views

Is transistor the only electronic component on a CPU?

I have been reading about CPUs recently and came to know that all logical blocks and memory on CPU can be made out of transistors. So is it the only electronic component on CPU? Edit(Made after first ...
-1
votes
2answers
155 views

Could a computer technically run without time measurement?

I just asked myself if a computer could technically run without time measurement? With time measurement I mean the human-invented method to measure season and day/night cycles: a year has 365 ...
20
votes
4answers
3k views

Why do CPUs typically connect to only one bus?

I found a motherboard architecture here: This looks to be the typical layout of motherboards. EDIT: Well, apparently it's not so typical anymore. Why does the CPU connect to only 1 bus? That ...
3
votes
5answers
306 views

Power increase causing voltage drop

I am a software engineer and I came across this article which states If a processor attempts to draw more power than a power supply system can provide (by drawing more current than the system can ...
1
vote
1answer
83 views

Is there any Static Hazard?

I read about Static Hazard. We know Static 1-hazard is: Input change causes output to go from 1 to 0 to 1. My note covers a Circuit as follows: My notes says: When ...
0
votes
1answer
121 views

Confused what computer architecture is in real [closed]

I am quite sure that this is a question which will be marked as "primarily opinion-based" but I would still like to ask it here only as you do not get so many intellectual, experienced and skilled ...
0
votes
1answer
65 views

Understanding computer organisation and architecture [closed]

What are some of the user friendly books for "computer organisation and architechture" which are best for self study. Such a text that one can grasps the big picture, and understandhow various things ...
1
vote
2answers
93 views

Why can't absolute delays be used in ASIC?

Verilog allows the definition of absolute delays when modelling hardware but the ASIC synthesizer will strip these out. Why does it do this?
1
vote
3answers
197 views

How can a powersupply have a large input volt range

I see that computer power supplies that can take a voltage input of anything between 90V and 260V at a frequency between 47Hz and 63Hz. Meanwhile it can output power at a very precise voltage. How ...
0
votes
4answers
217 views

direct mapping cache question

I have been doing the question below in what I thought was the correct way. After doing some more reading I am now slightly confused and would appreciate some clarification. Previously I was just ...
0
votes
1answer
38 views

solving pipelining data hazards using stalls

I have a question about fixing data hazards in a pipelined datapath using stalls. I have read slightly varying things on this. Some lectures I have found put the instruction decode (ID) in the same ...
0
votes
1answer
25 views

Exclusive execution unit in pipeline stage for execution of memory access instructions

I was studying pipeline concept in microarchitecture. My professor told me that memory read and write operations take longer time to execute since DRAM has a maximum frequency of 1333Mhz. Hence, when ...
-2
votes
1answer
93 views

Where is the control, address and data bus in a computer

So have been reading up on data buses, address buses and control buses and I understand what they do, but am confused about where they can physically be found. Some books/sites I have found state that ...
2
votes
2answers
842 views

What is the difference between full and partial address decoding?

Could someone please explain the difference between full address decoding and partial address decoding? I am reading the chapter on digital logic in "Structured Computer Organization", 6th ed. by ...
1
vote
1answer
159 views

Design an 8x4 memory chip using 2x1 memory chips? [duplicate]

I have been given this task to design a single 8x4 memory chip using only 2x1 memory chips. I have been searching everywhere on google for some decent information or example of how this is done, but ...
1
vote
1answer
154 views

Do registers have a multiplexer?

We are learning about general purpose shift registers. My professor draws them with like multiplexers connected to the D's of each flip flop. So in an example of a register with a 4 bit input and ...
0
votes
1answer
83 views

Error-Detecting Code and ASCII Character Code?

As ASCII character code uses seven bit to encode 128 characters and most computers manipulate an eighth-bit quantity as one byte and ASCII characters are stored one per eight bit, and an additional ...
0
votes
1answer
395 views

How many nibbles?

The question reads: You know a byte is 8 bits. We call a 4 bit-quantity a nibble.If a byte-addressable memory has a 14-bit address, how many nibbles of storage are in this memory? My answer: Now I ...
1
vote
1answer
127 views

Interfacing RAM to a DIY computer

I am a relatively newbie to electronics but hopefully this question is not very non sensical: I am following a guide to build a 8 bit computer. The guide requires a RAM which has a 4 address bit and ...
-3
votes
1answer
100 views

How some bits are turned on while others remain off

How does the computer turns physically different bits on and off? I mean that the electricity flows to the transistors in order to turn them on or off but there are many transistors so what part in ...
0
votes
2answers
165 views

Does the databus size matter for determining the range of the memory addresses?

If you have byte addressable memory, does it matter if you have a 32 bit or 64 bit databus for the range of the memory addresses for the words of the memory? E.g. : Assume a 32-bit word. If you have ...
1
vote
0answers
64 views

Operator synthesis VHDL, numeric_std.vhd

if i include the library numeric_std.vhd (the implementation is here https://standards.ieee.org/downloads/1076/1076.2-1996/numeric_std-body.vhdl) you can see that the operator *,+ (as instance are ...
0
votes
1answer
197 views

How to relate memory address to physical components in RAM?

I am trying to understand how are the micro-scale components arranged to relay address information to the Operating system software. What are the components that make up the ram which actually ...
2
votes
1answer
261 views

What multi/many-core (micro)processors/controllers should I use for “embarrassingly parallel” computations? [closed]

This is my first question ever on this site, so I hope I don't mess this up. :D I'll try to be as specific as possible. What I need: Something that I can program in C (or a C-like language). I ...
0
votes
3answers
166 views

How are alphabetic characters programmed into a computer?

I'm no cs student, I'm a programmer. I have a couple of questions and a few assumptions that I will make here (correct me if I'm wrong please). From my understanding is that all the sequences of 1 ...
0
votes
1answer
147 views

How much faster would optical computation be?

If (when) we could figure out a way to do computations with light as opposed to electrons within circuits, how much faster would our computers be?
2
votes
2answers
91 views

Are neuromorphic computers considered digital computers?

This might be a pretty simple question, but I am wondering if neuromorphic computers using non Von Neumann architectures such as the IBM TrueNorth chip are still considered digital computers. I have ...
0
votes
2answers
77 views

How can you have immediates in the SUBLEQ one instruction computer?

I'm thinking about making a SUBLEQ based CPU on FPGA. SUBLEQ (subtract and branch if less than or equal to zero) is an instruction which is universal. However, how can you have immediates/constants ...
1
vote
2answers
83 views

Is it OK to use the USB 5v pin as power source?

I am doing some stuff in my case and I need a power source for one LED from inside my case. I looked up and there are two +5v pins on a USB header inside my case. Is it OK to use them as power ...
1
vote
0answers
80 views

find cache hit rate for direct mapped cache memory

I have this practice exam problem which I am having trouble with. I have gone over many slides but haven't been able to really get it. The question is I currently have an 8 block main memory with ...
1
vote
1answer
187 views

single cycle vs multicycle datapath execution times

I have a question where I need to calculate the execution time for a program for single cycle and multicycle datapath. I think I may be doing it incorrectly since the multicycle execution time is ...
-2
votes
2answers
196 views

Are only word sizes used as structural elements in machine computation?

Research: I have been looking for some time online. everything i know in-fact. ive liked sparse matrix representations, i have found gate level sharing optimization after 'formula reduction' and ...
0
votes
1answer
108 views

Two dimensional 512 byte (byte addressable) RAM from 16 byte chips

Assume it is decided to design a two dimensional 512 byte (byte addressable) RAM from 16 byte chips. Each of the 16 byte chips has two select-lines. The chip is enabled only if both of the ...
1
vote
1answer
570 views

multicycle datapath vs single cycle datapath

I have a fairly simple question but have not been able to find a good answer googling. I understand how pipelining works by having 1 cycle per step, each instruction takes 5 cycles and they start ...
10
votes
4answers
5k views

How many clock cycles does a RISC/CISC instruction take to execute?

According to Digital Design and Computer Architecture by Harris and Harris, there are several ways to implement a MIPS processor, including the following: The single-cycle microarchitecture ...
0
votes
1answer
59 views

is it possible to mix chipsets

I'm designing a home made game console motherboard, and want to integrate the ATI Mobility Radeon 9000 GPU in it. The problem is, the Northbridge I picked only supports PCI Express, and the GPU uses ...
-1
votes
1answer
330 views

What is happening in the diagram of LC3?

This is a diagram of the LC3 Computer I am trying to understand what is happening in the parts I highlighted. The part I had highlighted had the instruction bit sign extended to 16 bits and then ...
1
vote
3answers
111 views

Benefit of (logically/virtually) separate I/O and memory bus

In my course on embedded systems, it is explained that memory inputs can be separated from I/O inputs using a "mode bit" for the address decoder. The most obvious advantage of this is that the amount ...