The constraints tag has no wiki summary.
2
votes
3answers
78 views
Fix Conflicting IO Standards
I am using the Basys 2 Spartan-3E FPGA board with Xilinx. I need the pmod i/o to be at 1.8v so I am using LVCMOS18 IOSTANDARD.
You can find all of the IOSTANDARD's available for Spartan-3E in this ...
3
votes
1answer
236 views
Does it always make sense to constrain an I/O port?
I am following an Altera online course on their timing analyzer software called TimeQuest. In it, their recommend that, at the very least, all clock and I/O ports be constrained.
In my FPGA design, I ...
4
votes
1answer
299 views
Discrepancy between post-Place-and-Route static timing analysis and ISIM simulation results
Overview
I'm implementing a simple Harvard-style CPU using Xilinx ISE version 14.1. I'm using settings compatible with a Digilent Nexys3 board, but for the time being the entire project is performed ...
1
vote
1answer
84 views
On the use of “BLOCK INTERCLOCKDOMAIN PATHS”
I based an FPGA design on Lattice reference code that, in the timing constraints .lpf file, specifies:
...
2
votes
1answer
218 views
constraint error and illegal load problem in Virtex-2
I am trying to test a very simple deskew circuit on a virtex-2pro FPGA (xc2vp30-fg676-5). I use xilinx ISE and the deskew IP (two DCMs with a DDR flop) provided by core generator. I also try to ...
8
votes
3answers
785 views
Op amp analysis: when are the “negative feedback rules” applicable?
When we build op amp circuits that use negative feedback, like so:
... we can analyze the circuit very easily, by assuming that $$v^- = v^+$$ due to negative feedback (when also assuming the op amp ...
5
votes
1answer
430 views
Analog Video PCB Layout
What special considerations and/or constraints are typically applied when routing analog video signals on a PCB (e.g. VGA, NTSC, etc). I'm thinking try and keep them routed on a single layer (i.e. at ...
5
votes
1answer
1k views
EAGLE Matched Length Pairs / Groups
What facilities does EAGLE CAD have for helping to do layout with matched length groups and differential pairs? Can you apply such a constraint in the auto-router? As a follow-on to this, what (other) ...
